From 3f818a1c06977b7f21fdbeabed845db168b8d685 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Franti=C5=A1ek=20Boh=C3=A1=C4=8Dek?= Date: Tue, 20 Dec 2022 22:51:58 +0100 Subject: [PATCH] Add patches for ATmega8 --- patch/atmega8.yaml | 85 +++++++++++++++++++++++++++ patch/timer/atmega8.yaml | 14 +++++ patch/timer/dev/16bit-mega8.yaml | 31 ++++++++++ patch/timer/dev/8bit-async-mega8.yaml | 29 +++++++++ patch/timer/dev/8bit-mega8.yaml | 11 ++++ vendor/atmega8.atdf | 7 +-- 6 files changed, 172 insertions(+), 5 deletions(-) create mode 100644 patch/timer/atmega8.yaml create mode 100644 patch/timer/dev/16bit-mega8.yaml create mode 100644 patch/timer/dev/8bit-async-mega8.yaml create mode 100644 patch/timer/dev/8bit-mega8.yaml diff --git a/patch/atmega8.yaml b/patch/atmega8.yaml index 64451a7..fb806fb 100644 --- a/patch/atmega8.yaml +++ b/patch/atmega8.yaml @@ -1 +1,86 @@ _svd: ../svd/atmega8.svd + +_include: + - "common/ac.yaml" + - "common/adc.yaml" + - "common/spi.yaml" + + - "timer/atmega8.yaml" + +TWI: + TWCR: + _modify: + TWWC: + access: read-only + TWSR: + _modify: + TWS: + access: read-only + TWPS: + _replace_enum: + PRESCALER_1: [0, "Prescaler Value 1"] + PRESCALER_4: [1, "Prescaler Value 4"] + PRESCALER_16: [2, "Prescaler Value 16"] + PRESCALER_64: [3, "Prescaler Value 64"] + +USART: + UCSRA: + _modify: + PE: + access: read-only + DOR: + access: read-only + FE: + access: read-only + UDRE: + access: read-only + TXC: + description: "USART Transmit Complete" + RXC: + access: read-only + UCSRB: + _modify: + RXB8: + access: read-only + UCSRC: + UMSEL: + _replace_enum: + USART_ASYNC: [0, "Asynchronous USART"] + USART_SYNC: [1, "Synchronous USART"] + UPM: + _replace_enum: + DISABLED: [0, "Disabled"] + PARITY_EVEN: [2, "Enabled, Even Parity"] + PARITY_ODD: [3, "Enabled, Odd Parity"] + USBS: + _replace_enum: + STOP1: [0, "1-bit"] + STOP2: [1, "2-bit"] + UCSZ: + _replace_enum: + CHR5: [0, "Character Size: 5 bit"] + CHR6: [1, "Character Size: 6 bit"] + CHR7: [2, "Character Size: 7 bit"] + CHR8: [3, "Character Size: 8 bit"] + UCPOL: + _replace_enum: + RISING_EDGE: [0, "Transmit on Rising XCK Edge, Receive on Falling XCK Edge"] + FALLING_EDGE: [1, "Transmit on Falling XCK Edge, Receive on Rising XCK Edge"] + +WDT: + WDTCR: + _delete: + - WDP + _add: + WDPL: + description: "Watchdog Timer Prescaler - Low Bits" + bitRange: "[2:0]" + WDPL: + CYCLES_16K: [0, "- 16K (16384) cycles, ~16ms"] + CYCLES_32K: [1, "- 32K (32768) cycles, ~32ms"] + CYCLES_64K: [2, "- 64K (65536) cycles, ~65s"] + CYCLES_128K: [3, "- 128K (131072) cycles, ~0.13s"] + CYCLES_256K: [4, "- 256K (262144) cycles, ~0.26s"] + CYCLES_512K: [5, "- 512K (524288) cycles, ~0.52s"] + CYCLES_1024K: [6, "- 1024K (1048576) cycles, ~1.0s"] + CYCLES_2048K: [7, "- 2048K (2097152) cycles, ~2.1s"] diff --git a/patch/timer/atmega8.yaml b/patch/timer/atmega8.yaml new file mode 100644 index 0000000..0fbb4b9 --- /dev/null +++ b/patch/timer/atmega8.yaml @@ -0,0 +1,14 @@ +# This intermediate file is needed because peripheral-level includes are not +# supported in top-level files. + +TC0: + _include: + - "dev/8bit-mega8.yaml" + +TC1: + _include: + - "dev/16bit-mega8.yaml" + +TC2: + _include: + - "dev/8bit-async-mega8.yaml" diff --git a/patch/timer/dev/16bit-mega8.yaml b/patch/timer/dev/16bit-mega8.yaml new file mode 100644 index 0000000..ee0e448 --- /dev/null +++ b/patch/timer/dev/16bit-mega8.yaml @@ -0,0 +1,31 @@ +TCCR?A: + _modify: + COM?A: + description: "Compare Output A Mode" + _write_constraint: enum + COM?B: + description: "Compare Output B Mode" + _write_constraint: enum + FOC??: + access: write-only + COM??: + _replace_enum: + DISCONNECTED: [0, "Normal port operation, OCix disconnected"] + MATCH_TOGGLE: [1, "Toggle OCix on Compare Match (Might depend on WGM)"] + MATCH_CLEAR: [2, "Clear OCix on Compare Match (If PWM is enabled, OCix is set at BOTTOM)"] + MATCH_SET: [3, "Set OCix on Compare Match (If PWM is enabled, OCix is cleared at BOTTOM)"] + +TCCR?B: + _modify: + CS?: + _write_constraint: enum + CS?: + _replace_enum: + NO_CLOCK: [0, "No clock source (Timer/Counter stopped)"] + DIRECT: [1, "Running, No Prescaling"] + PRESCALE_8: [2, "Running, CLK/8"] + PRESCALE_64: [3, "Running, CLK/64"] + PRESCALE_256: [4, "Running, CLK/256"] + PRESCALE_1024: [5, "Running, CLK/1024"] + EXT_FALLING: [6, "Running, ExtClk Tx Falling Edge"] + EXT_RISING: [7, "Running, ExtClk Tx Rising Edge"] diff --git a/patch/timer/dev/8bit-async-mega8.yaml b/patch/timer/dev/8bit-async-mega8.yaml new file mode 100644 index 0000000..d0c2a83 --- /dev/null +++ b/patch/timer/dev/8bit-async-mega8.yaml @@ -0,0 +1,29 @@ +TCCR?: + _modify: + COM?: + _write_constraint: enum + WGM?: + _write_constraint: enum + FOC?: + access: write-only + COM?: + _replace_enum: + DISCONNECTED: [0, "Normal port operation, OC2 disconnected"] + MATCH_CLEAR: [2, "Clear OC2 on Compare Match (If PWM is enabled, OC2 is set at BOTTOM)"] + MATCH_SET: [3, "Set OC2 on Compare Match (If PWM is enabled, OC2 is cleared at BOTTOM)"] + WGM?: + _replace_enum: + NORMAL_TOP: [0, "Normal, Top: `0xff`, Update: *Immediate*, Flag: *MAX*"] + PWM_PHASE: [1, "Phase Correct PWM, Top: `0xff`, Update: *TOP*, Flag: *BOTTOM*"] + CTC: [2, "CTC, Top: *OCR2*, Update: *Immediate*, Flag: *MAX*"] + PWM_FAST: [3, "Fast PWM, Top: `0xff`, Update: *BOTTOM*, Flag: *MAX*"] + CS?: + _replace_enum: + NO_CLOCK: [0, "No clock source (Timer/Counter stopped)"] + DIRECT: [1, "Running, No Prescaling"] + PRESCALE_8: [2, "Running, CLK/8"] + PRESCALE_32: [3, "Running, CLK/32"] + PRESCALE_64: [4, "Running, CLK/64"] + PRESCALE_128: [5, "Running, CLK/128"] + PRESCALE_256: [6, "Running, CLK/256"] + PRESCALE_1024: [7, "Running, CLK/1024"] diff --git a/patch/timer/dev/8bit-mega8.yaml b/patch/timer/dev/8bit-mega8.yaml new file mode 100644 index 0000000..e2162a1 --- /dev/null +++ b/patch/timer/dev/8bit-mega8.yaml @@ -0,0 +1,11 @@ +TCCR?: + CS0: + _replace_enum: + NO_CLOCK: [0, "No clock source (Timer/Counter stopped)"] + DIRECT: [1, "Running, No Prescaling"] + PRESCALE_8: [2, "Running, CLK/8"] + PRESCALE_64: [3, "Running, CLK/64"] + PRESCALE_256: [4, "Running, CLK/256"] + PRESCALE_1024: [5, "Running, CLK/1024"] + EXT_FALLING: [6, "Running, ExtClk Tx Falling Edge"] + EXT_RISING: [7, "Running, ExtClk Tx Rising Edge"] diff --git a/vendor/atmega8.atdf b/vendor/atmega8.atdf index 1295212..ec64a9b 100644 --- a/vendor/atmega8.atdf +++ b/vendor/atmega8.atdf @@ -557,9 +557,7 @@ - - - + @@ -629,9 +627,8 @@ - + - -- 2.49.0