M Cargo.toml => Cargo.toml +2 -0
@@ 33,7 33,9 @@ atmega32u4 = []
atmega64 = []
atmega644 = []
attiny84 = []
+attiny841 = []
attiny85 = []
+attiny861 = []
attiny88 = []
rt = ["avr-device-macros"]
M Makefile => Makefile +1 -1
@@ 1,6 1,6 @@
all: deps chips
-CHIPS := atmega1280 atmega168 atmega2560 atmega8 atmega328p atmega328pb atmega32u4 atmega4809 atmega48p atmega64 atmega644 attiny84 attiny85 attiny88
+CHIPS := atmega1280 atmega168 atmega2560 atmega8 atmega328p atmega328pb atmega32u4 atmega4809 atmega48p atmega64 atmega644 attiny84 attiny85 attiny88 attiny841 attiny861
RUSTUP_TOOLCHAIN ?= nightly
M README.md => README.md +2 -0
@@ 22,7 22,9 @@ Via the feature you can select which chip you want the register specifications f
* `atmega64`
* `atmega644`
* `attiny84`
+* `attiny841`
* `attiny85`
+* `attiny861`
* `attiny88`
## Build Instructions
A patch/attiny841.yaml => patch/attiny841.yaml +51 -0
@@ 0,0 1,51 @@
+_svd: ../svd/attiny841.svd
+
+_include:
+ - "common/ac.yaml"
+ - "common/port.yaml"
+ - "common/spi.yaml"
+ - "common/usart.yaml"
+ - "common/wdt.yaml"
+
+ - "timer/attiny841.yaml"
+
+ADC:
+ _modify:
+ ADCSRA:
+ access: read-write
+ ADCSRA:
+ ADPS:
+ _replace_enum:
+ PRESCALER_2: [1, "Prescaler Value 2"]
+ PRESCALER_4: [2, "Prescaler Value 4"]
+ PRESCALER_8: [3, "Prescaler Value 8"]
+ PRESCALER_16: [4, "Prescaler Value 16"]
+ PRESCALER_32: [5, "Prescaler Value 32"]
+ PRESCALER_64: [6, "Prescaler Value 64"]
+ PRESCALER_128: [7, "Prescaler Value 128"]
+ ADMUXB:
+ REFS:
+ _replace_enum:
+ VCC: [0, "Vcc"]
+ INTERNAL_1: [1, "Internal 1.1V Voltage Reference with AREF disconnected"]
+ INTERNAL_2: [2, "Internal 2.2V Voltage Reference with AREF disconnected"]
+ INTERNAL_4: [3, "Internal 4.096V Voltage Reference with AREF disconnected"]
+ AREF: [4, "AREF with internal reference off"]
+ AREF_INTERNAL_1: [5, "Internal 1.1V Voltage Reference with external capacitor at AREF pin"]
+ AREF_INTERNAL_2: [6, "Internal 2.2V Voltage Reference with external capacitor at AREF pin"]
+ AREF_INTERNAL_4: [7, "Internal 4.096V Voltage Reference with external capacitor at AREF pin"]
+
+# While this chip does have a TWI peripheral, it only performs as a
+# slave, so it doesn't have many of the fields that the common peripheral
+# does, like TWWC, TWAMR, and TWPS
+TWI*:
+ _modify:
+ TWCR:
+ access: read-write
+ TWSCRB:
+ TWAA:
+ _replace_enum:
+ ACK_WRITE: [0, "Send ACK when TWCMD is written as 10 or 11"]
+ ACK_READ: [1, "Send ACK when TWSD is read"]
+ NACK_WRITE: [2, "Send NACK when TWCMD is written as 10 or 11"]
+ NACK_READ: [3, "Send NACK when TWSD is read"]
A patch/attiny861.yaml => patch/attiny861.yaml +11 -0
@@ 0,0 1,11 @@
+_svd: ../svd/attiny861.svd
+
+_include:
+ - "common/ac.yaml"
+ - "common/adc.yaml"
+ - "common/port.yaml"
+ - "common/tiny/usi.yaml"
+ - "common/wdt.yaml"
+
+ - "timer/attiny861.yaml"
+
M patch/common/ac.yaml => patch/common/ac.yaml +4 -4
@@ 6,15 6,15 @@
# - Fix the "Interrupt Mode Select" enumerated values
AC:
_modify:
- ACSR:
+ ACSR,ACSR?A,ACSRA:
access: read-write
- ACSR:
+ ACSR,ACSR?A,ACSRA:
_modify:
- ACIS:
+ ACIS,ACIS?:
description: "Analog Comparator Interrupt Mode Select"
ACO:
access: read-only
- ACIS:
+ ACIS,ACIS?:
_replace_enum:
ON_TOGGLE: [0, "Interrupt on Toggle"]
# Leaving [1, 'Reserved'] out
A patch/timer/attiny841.yaml => patch/timer/attiny841.yaml +18 -0
@@ 0,0 1,18 @@
+# This intermediate file is needed because peripheral-level includes are not
+# supported in top-level files.
+
+_modify:
+ TC0:
+ description: "Timer/Counter0, 8-bit, PWM"
+ TC1:
+ description: "Timer/Counter1, 16-bit"
+ TC2:
+ description: "Timer/Counter2, 16-bit"
+
+TC0:
+ _include:
+ - "dev/8bit-tiny8n-tc0.yaml"
+
+TC1,TC2:
+ _include:
+ - "dev/16bit.yaml"
A patch/timer/attiny861.yaml => patch/timer/attiny861.yaml +16 -0
@@ 0,0 1,16 @@
+# This intermediate file is needed because peripheral-level includes are not
+# supported in top-level files.
+
+_modify:
+ TC0:
+ description: "Timer/Counter0"
+ TC1:
+ description: "Timer/Counter1, 10-bit"
+
+TC0:
+ _include:
+ - "dev/16bit-tiny861-tc0.yaml"
+
+TC1:
+ _include:
+ - "dev/10bit.yaml"
A patch/timer/dev/16bit-tiny861-tc0.yaml => patch/timer/dev/16bit-tiny861-tc0.yaml +19 -0
@@ 0,0 1,19 @@
+_modify:
+ TIFR?:
+ access: read-write
+
+TCCR?B:
+ _modify:
+ CS?:
+ _write_constraint: enum
+ CS?:
+ _replace_enum:
+ NO_CLOCK: [0, "No clock source (Timer/Counter stopped)"]
+ DIRECT: [1, "Running, No Prescaling"]
+ PRESCALE_8: [2, "Running, CLK/8"]
+ PRESCALE_64: [3, "Running, CLK/64"]
+ PRESCALE_256: [4, "Running, CLK/256"]
+ PRESCALE_1024: [5, "Running, CLK/1024"]
+ EXT_FALLING: [6, "Running, ExtClk Tx Falling Edge"]
+ EXT_RISING: [7, "Running, ExtClk Tx Rising Edge"]
+
M src/devices/mod.rs => src/devices/mod.rs +38 -0
@@ 231,6 231,25 @@ impl attiny84::Peripherals {
}
}
+/// [ATtiny841](https://www.microchip.com/wwwproducts/en/ATtiny841)
+#[cfg(feature = "attiny841")]
+pub mod attiny841;
+
+#[cfg(feature = "attiny841")]
+impl attiny841::Peripherals {
+ /// Returns all the peripherals *once*
+ #[inline]
+ pub fn take() -> Option<Self> {
+ crate::interrupt::free(|_| {
+ if unsafe { DEVICE_PERIPHERALS } {
+ None
+ } else {
+ Some(unsafe { attiny841::Peripherals::steal() })
+ }
+ })
+ }
+}
+
/// [ATtiny85](https://www.microchip.com/wwwproducts/en/ATtiny85)
#[cfg(feature = "attiny85")]
pub mod attiny85;
@@ 250,6 269,25 @@ impl attiny85::Peripherals {
}
}
+/// [ATtiny861](https://www.microchip.com/wwwproducts/en/ATtiny861)
+#[cfg(feature = "attiny861")]
+pub mod attiny861;
+
+#[cfg(feature = "attiny861")]
+impl attiny861::Peripherals {
+ /// Returns all the peripherals *once*
+ #[inline]
+ pub fn take() -> Option<Self> {
+ crate::interrupt::free(|_| {
+ if unsafe { DEVICE_PERIPHERALS } {
+ None
+ } else {
+ Some(unsafe { attiny861::Peripherals::steal() })
+ }
+ })
+ }
+}
+
/// [ATtiny88](https://www.microchip.com/wwwproducts/en/ATtiny88)
#[cfg(feature = "attiny88")]
pub mod attiny88;
M src/lib.rs => src/lib.rs +10 -0
@@ 11,7 11,9 @@
#![cfg_attr(feature = "atmega64", doc = "**atmega64**,")]
#![cfg_attr(feature = "atmega644", doc = "**atmega644**,")]
#![cfg_attr(feature = "attiny84", doc = "**attiny84**,")]
+#![cfg_attr(feature = "attiny841", doc = "**attiny841**,")]
#![cfg_attr(feature = "attiny85", doc = "**attiny85**,")]
+#![cfg_attr(feature = "attiny861", doc = "**attiny861**,")]
#![cfg_attr(feature = "attiny88", doc = "**attiny88**,")]
//! and a few things which apply to AVR microcontrollers generally.
//!
@@ 27,7 29,9 @@
//! * `atmega4809`
//! * `atmega48p`
//! * `atmega64`
+//! * `attiny841`
//! * `attiny85`
+//! * `attiny861`
//! * `attiny88`
#![no_std]
#![feature(llvm_asm)]
@@ 101,8 105,12 @@ pub use crate::devices::atmega644;
pub use crate::devices::atmega8;
#[cfg(feature = "attiny84")]
pub use crate::devices::attiny84;
+#[cfg(feature = "attiny841")]
+pub use crate::devices::attiny841;
#[cfg(feature = "attiny85")]
pub use crate::devices::attiny85;
+#[cfg(feature = "attiny861")]
+pub use crate::devices::attiny861;
#[cfg(feature = "attiny88")]
pub use crate::devices::attiny88;
@@ 119,7 127,9 @@ pub use crate::devices::attiny88;
feature = "atmega64",
feature = "atmega644",
feature = "attiny84",
+ feature = "attiny841",
feature = "attiny85",
+ feature = "attiny861",
feature = "attiny88",
)))]
compile_error!("You need to select at least one chip as a feature!");
A vendor/attiny841.atdf => vendor/attiny841.atdf +1125 -0
@@ 0,0 1,1125 @@
+<?xml version="1.0" encoding="UTF-8"?><avr-tools-device-file xmlns:xalan="http://xml.apache.org/xalan" xmlns:NumHelper="NumHelper" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" schema-version="0.3" xsi:noNamespaceSchemaLocation="../../schema/avr_tools_device_file.xsd">
+ <variants>
+ <variant ordercode="ATtiny841-SSU" package="SOIC14" pinout="SOIC_14" speedmax="16000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="1.7"/>
+ <variant ordercode="ATtiny841-MU" package="MLF20" pinout="QFN_20" speedmax="16000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="1.7"/>
+ <variant ordercode="ATtiny841-MMH" package="VQFN20" pinout="QFN_20" speedmax="16000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="1.7"/>
+ </variants>
+ <devices>
+ <device name="ATtiny841" architecture="AVR8" family="tinyAVR">
+ <address-spaces>
+ <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x2000">
+ <memory-segment start="0x0000" size="0x2000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x10"/>
+ </address-space>
+ <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+ <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+ </address-space>
+ <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+ <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+ </address-space>
+ <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+ <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+ </address-space>
+ <address-space endianness="little" name="data" id="data" start="0x0000" size="0x0300">
+ <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+ <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+ <memory-segment name="IRAM" start="0x0100" size="0x0200" type="ram" external="false"/>
+ </address-space>
+ <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0200">
+ <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
+ </address-space>
+ <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+ <address-space endianness="little" name="osccal" id="osccal" start="0" size="2">
+ <memory-segment start="0" size="2" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+ </address-space>
+ </address-spaces>
+ <peripherals>
+ <module name="PORT">
+ <instance name="PORTB" caption="I/O Port">
+ <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
+ <signals>
+ <signal function="PORTB" group="P" index="0" pad="PB0"/>
+ <signal function="PORTB" group="P" index="1" pad="PB1"/>
+ <signal function="PORTB" group="P" index="2" pad="PB2"/>
+ <signal function="PORTB" group="P" index="3" pad="PB3"/>
+ </signals>
+ </instance>
+ <instance name="PORTA" caption="I/O Port">
+ <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
+ <signals>
+ <signal function="PORTA" group="P" index="0" pad="PA0"/>
+ <signal function="PORTA" group="P" index="1" pad="PA1"/>
+ <signal function="PORTA" group="P" index="2" pad="PA2"/>
+ <signal function="PORTA" group="P" index="3" pad="PA3"/>
+ <signal function="PORTA" group="P" index="4" pad="PA4"/>
+ <signal function="PORTA" group="P" index="5" pad="PA5"/>
+ <signal function="PORTA" group="P" index="6" pad="PA6"/>
+ <signal function="PORTA" group="P" index="7" pad="PA7"/>
+ </signals>
+ </instance>
+ </module>
+ <module name="USART">
+ <instance name="USART1" caption="USART">
+ <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data" caption="USART"/>
+ <signals>
+ <signal function="USART" group="RXD" pad="PA4"/>
+ <signal function="USART" group="TXD" pad="PA5"/>
+ <signal function="USART" group="XCK" pad="PA6"/>
+ </signals>
+ </instance>
+ <instance name="USART0" caption="USART">
+ <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data" caption="USART"/>
+ <signals>
+ <signal field="U0MAP" function="USART" group="TXD" pad="PA1"/>
+ <signal field="U0MAP" function="USART" group="RXD" pad="PA2"/>
+ <signal field="U0MAP" function="USART" group="XCK" pad="PA3"/>
+ <signal field="U0MAP" function="USART_ALT" group="TXD" pad="PA7"/>
+ <signal field="U0MAP" function="USART_ALT" group="RXD" pad="PB2"/>
+ <signal field="U0MAP" function="USART_ALT" group="XCK" pad="PA3"/>
+ </signals>
+ </instance>
+ </module>
+ <module name="WDT">
+ <instance name="WDT" caption="Watchdog Timer">
+ <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
+ </instance>
+ </module>
+ <module name="TWI">
+ <instance name="TWI" caption="Two Wire Serial Interface">
+ <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data" caption="Two Wire Serial Interface"/>
+ <signals>
+ <signal function="TWI" group="SCL" pad="PA4"/>
+ <signal function="TWI" group="SDA" pad="PA6"/>
+ </signals>
+ </instance>
+ </module>
+ <module name="ADC">
+ <instance name="ADC" caption="Analog-to-Digital Converter">
+ <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
+ <signals>
+ <signal function="ADC" group="ADC" index="0" pad="PA0"/>
+ <signal function="ADC" group="ADC" index="1" pad="PA1"/>
+ <signal function="ADC" group="ADC" index="2" pad="PA2"/>
+ <signal function="ADC" group="ADC" index="3" pad="PA3"/>
+ <signal function="ADC" group="ADC" index="4" pad="PA4"/>
+ <signal function="ADC" group="ADC" index="5" pad="PA5"/>
+ <signal function="ADC" group="ADC" index="6" pad="PA6"/>
+ <signal function="ADC" group="ADC" index="7" pad="PA7"/>
+ <signal function="ADC" group="ADC" index="8" pad="PB2"/>
+ <signal function="ADC" group="ADC" index="9" pad="PB3"/>
+ <signal function="ADC" group="ADC" index="10" pad="PB0"/>
+ <signal function="ADC" group="ADC" index="11" pad="PB1"/>
+ <signal function="AREF" group="AREF" pad="PA0"/>
+ </signals>
+ </instance>
+ </module>
+ <module name="AC">
+ <instance name="AC" caption="Analog Comparator">
+ <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
+ <signals>
+ <signal function="ACIN0" group="AIN0" index="0" pad="PA1"/>
+ <signal function="ACIN0" group="AIN0" index="1" pad="PA2"/>
+ <signal function="ACOUT" group="ACO0" pad="PA5"/>
+ <signal function="ACOUT" group="ACO1" pad="PA6"/>
+ <signal function="ACIN1" group="AIN1" index="0" pad="PA3"/>
+ <signal function="ACIN1" group="AIN1" index="1" pad="PA4"/>
+ </signals>
+ </instance>
+ </module>
+ <module name="EEPROM">
+ <instance name="EEPROM" caption="EEPROM">
+ <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
+ </instance>
+ </module>
+ <module name="TC16">
+ <instance name="TC1" caption="Timer/Counter, 16-bit">
+ <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
+ <signals>
+ <signal function="OC" group="TOCC" index="0" pad="PA1"/>
+ <signal function="OC" group="TOCC" index="1" pad="PA2"/>
+ <signal function="OC" group="TOCC" index="2" pad="PA3"/>
+ <signal function="OC" group="TOCC" index="3" pad="PA4"/>
+ <signal function="OC" group="TOCC" index="4" pad="PA5"/>
+ <signal function="OC" group="TOCC" index="5" pad="PA6"/>
+ <signal function="OC" group="TOCC" index="6" pad="PA7"/>
+ <signal function="OC" group="TOCC" index="7" pad="PB2"/>
+ <signal function="CS" group="T0" pad="PA3"/>
+ <signal function="CS" group="T1" pad="PA4"/>
+ <signal function="CS" group="T2" pad="PA5"/>
+ <signal function="ICP" group="ICP1" pad="PA7"/>
+ </signals>
+ </instance>
+ <instance name="TC2" caption="Timer/Counter, 16-bit">
+ <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
+ <signals>
+ <signal function="OC" group="TOCC" index="0" pad="PA1"/>
+ <signal function="OC" group="TOCC" index="1" pad="PA2"/>
+ <signal function="OC" group="TOCC" index="2" pad="PA3"/>
+ <signal function="OC" group="TOCC" index="3" pad="PA4"/>
+ <signal function="OC" group="TOCC" index="4" pad="PA5"/>
+ <signal function="OC" group="TOCC" index="5" pad="PA6"/>
+ <signal function="OC" group="TOCC" index="6" pad="PA7"/>
+ <signal function="OC" group="TOCC" index="7" pad="PB2"/>
+ <signal function="CS" group="T0" pad="PA3"/>
+ <signal function="CS" group="T1" pad="PA4"/>
+ <signal function="CS" group="T2" pad="PA5"/>
+ <signal function="ICP" group="ICP2" pad="PB2"/>
+ </signals>
+ </instance>
+ </module>
+ <module name="TC8">
+ <instance name="TC0" caption="Timer/Counter, 8-bit">
+ <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
+ <signals>
+ <signal function="OC" group="TOCC" index="0" pad="PA1"/>
+ <signal function="OC" group="TOCC" index="0" pad="PA2"/>
+ <signal function="OC" group="TOCC" index="0" pad="PA3"/>
+ <signal function="OC" group="TOCC" index="0" pad="PA4"/>
+ <signal function="OC" group="TOCC" index="0" pad="PA5"/>
+ <signal function="OC" group="TOCC" index="0" pad="PA6"/>
+ <signal function="OC" group="TOCC" index="0" pad="PA7"/>
+ <signal function="OC" group="TOCC" index="0" pad="PB2"/>
+ <signal function="CS" group="T0" pad="PA3"/>
+ <signal function="CS" group="T1" pad="PA4"/>
+ <signal function="CS" group="T2" pad="PA5"/>
+ </signals>
+ </instance>
+ </module>
+ <module name="EXINT">
+ <instance name="EXINT" caption="External Interrupts">
+ <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
+ <signals>
+ <signal function="EXTINT" group="PCINT" index="0" pad="PA0"/>
+ <signal function="EXTINT" group="PCINT" index="1" pad="PA1"/>
+ <signal function="EXTINT" group="PCINT" index="2" pad="PA2"/>
+ <signal function="EXTINT" group="PCINT" index="3" pad="PA3"/>
+ <signal function="EXTINT" group="PCINT" index="4" pad="PA4"/>
+ <signal function="EXTINT" group="PCINT" index="5" pad="PA5"/>
+ <signal function="EXTINT" group="PCINT" index="6" pad="PA6"/>
+ <signal function="EXTINT" group="PCINT" index="7" pad="PA7"/>
+ <signal function="EXTINT" group="PCINT" index="8" pad="PB0"/>
+ <signal function="EXTINT" group="PCINT" index="9" pad="PB1"/>
+ <signal function="EXTINT" group="PCINT" index="10" pad="PB2"/>
+ <signal function="EXTINT" group="PCINT" index="11" pad="PB3"/>
+ <signal function="EXTINT" group="INT" index="0" pad="PB1"/>
+ </signals>
+ </instance>
+ </module>
+ <module name="CPU">
+ <instance name="CPU" caption="CPU Registers">
+ <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
+ <parameters>
+ <param name="CORE_VERSION" value="V2"/>
+ <param name="NEW_INSTRUCTIONS" value="lpm rd,z+"/>
+ </parameters></instance>
+ </module>
+ <module name="TOCPM">
+ <instance name="TOCPM" caption="Timer/Counter Output Compare Pin">
+ <register-group name="TOCPM" name-in-module="TOCPM" offset="0x00" address-space="data" caption="Timer/Counter Output Compare Pin"/>
+ </instance>
+ </module>
+ <module name="SPI">
+ <instance name="SPI" caption="Serial Peripheral Interface">
+ <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
+ <signals>
+ <signal field="SPIMAP" function="SPI_ALT" group="MISO" pad="PA0"/>
+ <signal field="SPIMAP" function="SPI_ALT" group="MOSI" pad="PA1"/>
+ <signal field="SPIMAP" function="SPI_ALT" group="SS" pad="PA2"/>
+ <signal field="SPIMAP" function="SPI_ALT" group="SCK" pad="PA3"/>
+ <signal field="SPIMAP" function="SPI" group="SCK" pad="PA4"/>
+ <signal field="SPIMAP" function="SPI" group="MISO" pad="PA5"/>
+ <signal field="SPIMAP" function="SPI" group="MOSI" pad="PA6"/>
+ <signal field="SPIMAP" function="SPI" group="SS" pad="PA7"/>
+ </signals>
+ </instance>
+ </module>
+ <module name="FUSE">
+ <instance name="FUSE" caption="Fuses">
+ <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
+ </instance>
+ </module>
+ <module name="LOCKBIT">
+ <instance name="LOCKBIT" caption="Lockbits">
+ <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
+ </instance>
+ </module>
+ </peripherals>
+ <interrupts>
+ <interrupt index="0" name="RESET" caption="External Pin, Power-on Reset, Brown-out Reset and Watchdog Reset"/>
+ <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+ <interrupt index="2" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+ <interrupt index="3" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
+ <interrupt index="4" name="WDT" caption="Watchdog Time-out Interrupt"/>
+ <interrupt index="5" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+ <interrupt index="6" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+ <interrupt index="7" name="TIMER1_COMPB" caption="Timer/Counter1 Compare Match B"/>
+ <interrupt index="8" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+ <interrupt index="9" name="TIMER0_COMPA" caption="TimerCounter0 Compare Match A"/>
+ <interrupt index="10" name="TIMER0_COMPB" caption="TimerCounter0 Compare Match B"/>
+ <interrupt index="11" name="TIMER0_OVF" caption="Timer/Couner0 Overflow"/>
+ <interrupt index="12" name="ANA_COMP0" caption="Analog Comparator 0"/>
+ <interrupt index="13" name="ADC" caption="ADC Conversion Complete"/>
+ <interrupt index="14" name="EE_RDY" caption="EEPROM Ready"/>
+ <interrupt index="15" name="ANA_COMP1" caption="Analog Comparator 1"/>
+ <interrupt index="16" name="TIMER2_CAPT" caption="Timer/Counter2 Capture Event"/>
+ <interrupt index="17" name="TIMER2_COMPA" caption="Timer/Counter2 Compare Match A"/>
+ <interrupt index="18" name="TIMER2_COMPB" caption="Timer/Counter2 Compare Match B"/>
+ <interrupt index="19" name="TIMER2_OVF" caption="Timer/Counter2 Overflow"/>
+ <interrupt index="20" name="SPI" caption="Serial Peripheral Interface"/>
+ <interrupt index="21" name="USART0_START" caption="USART0, Start"/>
+ <interrupt index="22" name="USART0_RX" caption="USART0, Rx Complete"/>
+ <interrupt index="23" name="USART0_UDRE" caption="USART0 Data Register Empty"/>
+ <interrupt index="24" name="USART0_TX" caption="USART0, Tx Complete"/>
+ <interrupt index="25" name="USART1_START" caption="USART1, Start"/>
+ <interrupt index="26" name="USART1_RX" caption="USART1, Rx Complete"/>
+ <interrupt index="27" name="USART1_UDRE" caption="USART1 Data Register Empty"/>
+ <interrupt index="28" name="USART1_TX" caption="USART1, Tx Complete"/>
+ <interrupt index="29" name="TWI_SLAVE" caption="Two-wire Serial Interface"/>
+ </interrupts>
+ <interfaces>
+ <interface name="ISP" type="isp"/>
+ <interface name="HVSP" type="hvsp"/>
+ <interface name="debugWIRE" type="dw"/>
+ </interfaces>
+ <property-groups>
+ <property-group name="SIGNATURES">
+ <property name="JTAGID" value="0x9315"/>
+ <property name="SIGNATURE0" value="0x1e"/>
+ <property name="SIGNATURE1" value="0x93"/>
+ <property name="SIGNATURE2" value="0x15"/>
+ </property-group>
+ <property-group name="OCD">
+ <property name="OCD_REVISION" value="1"/>
+ <property name="OCD_DATAREG" value="0x27"/>
+ <property name="PROGBASE" value="0x0000"/>
+ <property name="BUFFERS_PER_FLASH_PAGE" value="4"/>
+ </property-group>
+ <property-group name="JTAG_INTERFACE">
+ <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+ </property-group>
+ <property-group name="ISP_INTERFACE_STK600">
+ <property name="IspEnterProgMode_timeout" value="200"/>
+ <property name="IspEnterProgMode_stabDelay" value="100"/>
+ <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+ <property name="IspEnterProgMode_synchLoops" value="32"/>
+ <property name="IspEnterProgMode_byteDelay" value="0"/>
+ <property name="IspEnterProgMode_pollIndex" value="3"/>
+ <property name="IspEnterProgMode_pollValue" value="0x53"/>
+ <property name="IspLeaveProgMode_preDelay" value="1"/>
+ <property name="IspLeaveProgMode_postDelay" value="1"/>
+ <property name="IspChipErase_eraseDelay" value="45"/>
+ <property name="IspChipErase_pollMethod" value="1"/>
+ <property name="IspProgramFlash_mode" value="0x41"/>
+ <property name="IspProgramFlash_blockSize" value="16"/>
+ <property name="IspProgramFlash_delay" value="6"/>
+ <property name="IspProgramFlash_cmd1" value="0x40"/>
+ <property name="IspProgramFlash_cmd2" value="0x4C"/>
+ <property name="IspProgramFlash_cmd3" value="0x00"/>
+ <property name="IspProgramFlash_pollVal1" value="0x00"/>
+ <property name="IspProgramFlash_pollVal2" value="0x00"/>
+ <property name="IspProgramEeprom_mode" value="0x41"/>
+ <property name="IspProgramEeprom_blockSize" value="4"/>
+ <property name="IspProgramEeprom_delay" value="5"/>
+ <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+ <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+ <property name="IspProgramEeprom_cmd3" value="0x00"/>
+ <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+ <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+ <property name="IspReadFlash_blockSize" value="256"/>
+ <property name="IspReadEeprom_blockSize" value="256"/>
+ <property name="IspReadFuse_pollIndex" value="4"/>
+ <property name="IspReadLock_pollIndex" value="4"/>
+ <property name="IspReadSign_pollIndex" value="4"/>
+ <property name="IspReadOsccal_pollIndex" value="4"/>
+ </property-group>
+ <property-group name="HVSP_INTERFACE_STK600">
+ <property name="HvspControlStack" value="0x4C 0x0C 0x1C 0x2C 0x3C 0x64 0x74 0x66 0x68 0x78 0x68 0x68 0x7A 0x6A 0x68 0x78 0x78 0x7D 0x6D 0x0C 0x80 0x40 0x20 0x10 0x11 0x08 0x04 0x02 0x03 0x08 0x04 0x0F"/>
+ <property name="HvspEnterProgMode_stabDelay" value="100"/>
+ <property name="HvspEnterProgMode_cmdexeDelay" value="0"/>
+ <property name="HvspEnterProgMode_synchCycles" value="6"/>
+ <property name="HvspEnterProgMode_latchCycles" value="1"/>
+ <property name="HvspEnterProgMode_toggleVtg" value="1"/>
+ <property name="HvspEnterProgMode_powoffDelay" value="20"/>
+ <property name="HvspEnterProgMode_resetDelay1" value="0"/>
+ <property name="HvspEnterProgMode_resetDelay2" value="70"/>
+ <property name="HvspLeaveProgMode_stabDelay" value="100"/>
+ <property name="HvspLeaveProgMode_resetDelay" value="25"/>
+ <property name="HvspChipErase_pollTimeout" value="40"/>
+ <property name="HvspChipErase_eraseTime" value="0"/>
+ <property name="HvspProgramFlash_mode" value="0x07"/>
+ <property name="HvspProgramFlash_blockSize" value="256"/>
+ <property name="HvspProgramFlash_pollTimeout" value="5"/>
+ <property name="HvspReadFlash_blockSize" value="256"/>
+ <property name="HvspProgramEeprom_mode" value="0x05"/>
+ <property name="HvspProgramEeprom_blockSize" value="256"/>
+ <property name="HvspProgramEeprom_pollTimeout" value="5"/>
+ <property name="HvspReadEeprom_blockSize" value="256"/>
+ <property name="HvspProgramFuse_pollTimeout" value="25"/>
+ <property name="HvspProgramLock_pollTimeout" value="25"/>
+ </property-group>
+ <property-group name="ISP_INTERFACE">
+ <property name="IspEnterProgMode_timeout" value="200"/>
+ <property name="IspEnterProgMode_stabDelay" value="100"/>
+ <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+ <property name="IspEnterProgMode_synchLoops" value="32"/>
+ <property name="IspEnterProgMode_byteDelay" value="0"/>
+ <property name="IspEnterProgMode_pollIndex" value="3"/>
+ <property name="IspEnterProgMode_pollValue" value="0x53"/>
+ <property name="IspLeaveProgMode_preDelay" value="1"/>
+ <property name="IspLeaveProgMode_postDelay" value="1"/>
+ <property name="IspChipErase_eraseDelay" value="45"/>
+ <property name="IspChipErase_pollMethod" value="1"/>
+ <property name="IspProgramFlash_mode" value="0x41"/>
+ <property name="IspProgramFlash_blockSize" value="16"/>
+ <property name="IspProgramFlash_delay" value="10"/>
+ <property name="IspProgramFlash_cmd1" value="0x40"/>
+ <property name="IspProgramFlash_cmd2" value="0x4C"/>
+ <property name="IspProgramFlash_cmd3" value="0x00"/>
+ <property name="IspProgramFlash_pollVal1" value="0x00"/>
+ <property name="IspProgramFlash_pollVal2" value="0x00"/>
+ <property name="IspProgramEeprom_mode" value="0x41"/>
+ <property name="IspProgramEeprom_blockSize" value="4"/>
+ <property name="IspProgramEeprom_delay" value="10"/>
+ <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+ <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+ <property name="IspProgramEeprom_cmd3" value="0x00"/>
+ <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+ <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+ <property name="IspReadFlash_blockSize" value="256"/>
+ <property name="IspReadEeprom_blockSize" value="256"/>
+ <property name="IspReadFuse_pollIndex" value="4"/>
+ <property name="IspReadLock_pollIndex" value="4"/>
+ <property name="IspReadSign_pollIndex" value="4"/>
+ <property name="IspReadOsccal_pollIndex" value="4"/>
+ </property-group>
+ <property-group name="HVSP_INTERFACE">
+ <property name="HvspControlStack" value="0x4C 0x0C 0x1C 0x2C 0x3C 0x64 0x74 0x66 0x68 0x78 0x68 0x68 0x7A 0x6A 0x68 0x78 0x78 0x7D 0x6D 0x0C 0x80 0x40 0x20 0x10 0x11 0x08 0x04 0x02 0x03 0x08 0x04 0x0F"/>
+ <property name="HvspEnterProgMode_stabDelay" value="100"/>
+ <property name="HvspEnterProgMode_cmdexeDelay" value="0"/>
+ <property name="HvspEnterProgMode_synchCycles" value="6"/>
+ <property name="HvspEnterProgMode_latchCycles" value="1"/>
+ <property name="HvspEnterProgMode_toggleVtg" value="1"/>
+ <property name="HvspEnterProgMode_powoffDelay" value="25"/>
+ <property name="HvspEnterProgMode_resetDelay1" value="1"/>
+ <property name="HvspEnterProgMode_resetDelay2" value="0"/>
+ <property name="HvspLeaveProgMode_stabDelay" value="100"/>
+ <property name="HvspLeaveProgMode_resetDelay" value="25"/>
+ <property name="HvspChipErase_pollTimeout" value="40"/>
+ <property name="HvspChipErase_eraseTime" value="0"/>
+ <property name="HvspProgramFlash_mode" value="0x07"/>
+ <property name="HvspProgramFlash_blockSize" value="256"/>
+ <property name="HvspProgramFlash_pollTimeout" value="5"/>
+ <property name="HvspReadFlash_blockSize" value="256"/>
+ <property name="HvspProgramEeprom_mode" value="0x05"/>
+ <property name="HvspProgramEeprom_blockSize" value="256"/>
+ <property name="HvspProgramEeprom_pollTimeout" value="5"/>
+ <property name="HvspReadEeprom_blockSize" value="256"/>
+ <property name="HvspProgramFuse_pollTimeout" value="25"/>
+ <property name="HvspProgramLock_pollTimeout" value="25"/>
+ </property-group>
+ </property-groups>
+ </device>
+ </devices>
+ <modules>
+ <module caption="Fuses" name="FUSE">
+ <register-group caption="Fuses" name="FUSE">
+ <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
+ <bitfield caption="Frequency selection for internal ULP oscillator. The selection only affects system clock, watchdog and reset timeout always use 32 kHz clock." mask="0xE0" name="ULPOSCSEL" values="ENUM_ULPOSCSEL"/>
+ <bitfield caption="BOD mode of operation when the device is in sleep mode" mask="0x18" name="BODPD" values="ENUM_BODMODE"/>
+ <bitfield caption="BOD mode of operation when the device is active or idle" mask="0x06" name="BODACT" values="ENUM_BODMODE"/>
+ <bitfield caption="Self Programming enable" mask="0x01" name="SELFPRGEN"/>
+ </register>
+ <register caption="" name="HIGH" offset="0x01" size="1" initval="0xDF">
+ <bitfield caption="Reset Disabled (Enable PC2 as i/o pin)" mask="0x80" name="RSTDISBL"/>
+ <bitfield caption="Debug Wire enable" mask="0x40" name="DWEN"/>
+ <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+ <bitfield caption="Watch-dog Timer always on" mask="0x10" name="WDTON"/>
+ <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+ <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
+ </register>
+ <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+ <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+ <bitfield caption="Clock output on PORTC2" mask="0x40" name="CKOUT"/>
+ <bitfield caption="Select Clock Source" mask="0x1F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+ </register>
+ </register-group>
+ <value-group caption="" name="ENUM_SUT_CKSEL">
+ <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/16 CK + 16 ms" name="EXTCLK_6CK_16CK_16MS" value="0x00"/>
+ <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/16 CK + 16 ms" name="INTRCOSC_8MHZ_6CK_16CK_16MS" value="0x02"/>
+ <value caption="Int. ULP Osc.; Start-up time PWRDWN/RESET: 6 CK/16 CK + 16 ms" name="INTULPOSC_32KHZ_6CK_16CK_16MS" value="0x04"/>
+ <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/16 CK + 16 ms" name="EXTLOFXTAL_1KCK_16CK_16MS" value="0x06"/>
+ <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/16 CK + 16 ms" name="EXTLOFXTAL_32KCK_14CK_16MS" value="0x16"/>
+ <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/16 CK + 16 ms" name="EXTCRES_0MHZ4_0MHZ9_258CK_16CK_16MS" value="0x08"/>
+ <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK/16 CK + 16 ms" name="EXTCRES_0MHZ4_0MHZ9_1KCK_16CK_16MS" value="0x18"/>
+ <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16 K CK/16 CK + 16 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_16CK_16MS" value="0x09"/>
+ <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/16 CK + 16 ms" name="EXTCRES_0MHZ9_3MHZ_258CK_16CK_16MS" value="0x0a"/>
+ <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK/16 CK + 16 ms" name="EXTCRES_0MHZ9_3MHZ_1KCK_16CK_16MS" value="0x1a"/>
+ <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16 K CK/16 CK + 16 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_16CK_16MS" value="0x0b"/>
+ <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/16 CK + 16 ms" name="EXTCRES_3MHZ_8MHZ_258CK_16CK_16MS" value="0x0c"/>
+ <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK/16 CK + 16 ms" name="EXTCRES_3MHZ_8MHZ_1KCK_16CK_16MS" value="0x1c"/>
+ <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16 K CK/16 CK + 16 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_16CK_16MS" value="0x0d"/>
+ <value caption="Ext. Ceramic Res. 8.0- MHz; Start-up time PWRDWN/RESET: 258 CK/16 CK + 16 ms" name="EXTCRES_8MHZ_XX_258CK_16CK_16MS" value="0x0e"/>
+ <value caption="Ext. Ceramic Res. 8.0- MHz; Start-up time PWRDWN/RESET: 1K CK/16 CK + 16 ms" name="EXTCRES_8MHZ_XX_1KCK_16CK_16MS" value="0x1e"/>
+ <value caption="Ext. Crystal Osc. 8.0- MHz; Start-up time PWRDWN/RESET: 16 K CK/16 CK + 16 ms" name="EXTXOSC_8MHZ_XX_16KCK_16CK_16MS" value="0x0f"/>
+ </value-group>
+ <value-group caption="" name="ENUM_BODLEVEL">
+ <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
+ <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x05"/>
+ <value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x06"/>
+ </value-group>
+ <value-group caption="" name="ENUM_BODMODE">
+ <value caption="Sampled" name="BOD_SAMPLED" value="0x01"/>
+ <value caption="Enabled" name="BOD_ENABLED" value="0x02"/>
+ <value caption="Disabled" name="BOD_DISABLED" value="0x03"/>
+ </value-group>
+ <value-group caption="" name="ENUM_ULPOSCSEL">
+ <value caption="32 kHz" name="ULPOSC_32KHZ" value="0x07"/>
+ <value caption="64 kHz" name="ULPOSC_64KHZ" value="0x06"/>
+ <value caption="128 kHz" name="ULPOSC_128KHZ" value="0x05"/>
+ <value caption="256 kHz" name="ULPOSC_256KHZ" value="0x04"/>
+ <value caption="512 kHz" name="ULPOSC_512KHZ" value="0x03"/>
+ </value-group>
+ </module>
+ <module caption="Lockbits" name="LOCKBIT">
+ <register-group caption="Lockbits" name="LOCKBIT">
+ <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+ <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+ </register>
+ </register-group>
+ <value-group caption="" name="ENUM_LB">
+ <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+ <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+ <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+ </value-group>
+ </module>
+ <module caption="I/O Port" name="PORT">
+ <register-group caption="I/O Port" name="PORTB">
+ <register caption="Port Control Register" name="PORTCR" offset="0x64" size="1">
+ <bitfield caption="Break-Before-Make Mode Enable" mask="0x02" name="BBMB"/>
+ </register>
+ <register caption="Pull-up Enable Control Register" name="PUEB" offset="0x62" size="1" mask="0x0F"/>
+ <register caption="Data Direction Register, Port B" name="DDRB" offset="0x37" size="1" mask="0x0F"/>
+ <register caption="Port B Data register" name="PINB" offset="0x36" size="1" mask="0x0F"/>
+ <register caption="Input Pins, Port B" name="PORTB" offset="0x38" size="1" mask="0x0F"/>
+ </register-group>
+ <register-group caption="I/O Port" name="PORTA">
+ <register caption="Port Control Register" name="PORTCR" offset="0x64" size="1">
+ <bitfield caption="Break-Before-Make Mode Enable" mask="0x01" name="BBMA"/>
+ </register>
+ <register caption="Pull-up Enable Control Register" name="PUEA" offset="0x63" size="1" mask="0xFF"/>
+ <register caption="Port A Data Register" name="PORTA" offset="0x3B" size="1" mask="0xFF"/>
+ <register caption="Data Direction Register, Port A" name="DDRA" offset="0x3A" size="1" mask="0xFF"/>
+ <register caption="Port A Input Pins" name="PINA" offset="0x39" size="1" mask="0xFF"/>
+ <register caption="Port High Drive Enable Register" name="PHDE" offset="0x6A" size="1">
+ <bitfield caption="PortA High Drive Enable" mask="0x03" name="PHDEA"/>
+ </register>
+ </register-group>
+ </module>
+ <module caption="USART" name="USART">
+ <register-group caption="USART" name="USART1">
+ <register caption="USART I/O Data Register" name="UDR1" offset="0x90" size="1" mask="0xFF" ocd-rw=""/>
+ <register caption="USART Control and Status Register A" name="UCSR1A" offset="0x96" size="1" ocd-rw="R">
+ <bitfield caption="USART Receive Complete" mask="0x80" name="RXC1"/>
+ <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC1"/>
+ <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE1"/>
+ <bitfield caption="Framing Error" mask="0x10" name="FE1"/>
+ <bitfield caption="Data overRun" mask="0x08" name="DOR1"/>
+ <bitfield caption="Parity Error" mask="0x04" name="UPE1"/>
+ <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X1"/>
+ <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM1"/>
+ </register>
+ <register caption="USART Control and Status Register B" name="UCSR1B" offset="0x95" size="1">
+ <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE1"/>
+ <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE1"/>
+ <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE1"/>
+ <bitfield caption="Receiver Enable" mask="0x10" name="RXEN1"/>
+ <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN1"/>
+ <bitfield caption="Character Size" mask="0x04" name="UCSZ12"/>
+ <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB81"/>
+ <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB81"/>
+ </register>
+ <register caption="USART Control and Status Register C" name="UCSR1C" offset="0x94" size="1">
+ <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL1" values="COMM_USART_MODE_2BIT"/>
+ <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM1" values="COMM_UPM_PARITY_MODE"/>
+ <bitfield caption="Stop Bit Select" mask="0x08" name="USBS1" values="COMM_STOP_BIT_SEL"/>
+ <bitfield caption="Character Size" mask="0x06" name="UCSZ1"/>
+ <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL1"/>
+ </register>
+ <register caption="USART Control and Status Register D" name="UCSR1D" offset="0x93" size="1">
+ <bitfield caption="USART RX Start Interrupt Enable" mask="0x80" name="RXSIE1"/>
+ <bitfield caption="USART RX Start Flag" mask="0x40" name="RXS1"/>
+ <bitfield caption="USART RX Start Frame Detection Enable" mask="0x20" name="SFDE1"/>
+ </register>
+ <register caption="USART Baud Rate Register Bytes" name="UBRR1" offset="0x91" size="2" mask="0x0FFF"/>
+ </register-group>
+ <register-group caption="USART" name="USART0">
+ <register caption="USART I/O Data Register" name="UDR0" offset="0x80" size="1" mask="0xFF" ocd-rw=""/>
+ <register caption="USART Control and Status Register A" name="UCSR0A" offset="0x86" size="1" ocd-rw="R">
+ <bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
+ <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC0"/>
+ <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
+ <bitfield caption="Framing Error" mask="0x10" name="FE0"/>
+ <bitfield caption="Data overRun" mask="0x08" name="DOR0"/>
+ <bitfield caption="Parity Error" mask="0x04" name="UPE0"/>
+ <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X0"/>
+ <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM0"/>
+ </register>
+ <register caption="USART Control and Status Register B" name="UCSR0B" offset="0x85" size="1">
+ <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE0"/>
+ <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE0"/>
+ <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE0"/>
+ <bitfield caption="Receiver Enable" mask="0x10" name="RXEN0"/>
+ <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN0"/>
+ <bitfield caption="Character Size" mask="0x04" name="UCSZ02"/>
+ <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB80"/>
+ <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB80"/>
+ </register>
+ <register caption="USART Control and Status Register C" name="UCSR0C" offset="0x84" size="1">
+ <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL0" values="COMM_USART_MODE_2BIT"/>
+ <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM0" values="COMM_UPM_PARITY_MODE"/>
+ <bitfield caption="Stop Bit Select" mask="0x08" name="USBS0" values="COMM_STOP_BIT_SEL"/>
+ <bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
+ <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
+ </register>
+ <register caption="USART Control and Status Register D" name="UCSR0D" offset="0x83" size="1">
+ <bitfield caption="USART RX Start Interrupt Enable" mask="0x80" name="RXSIE0"/>
+ <bitfield caption="USART RX Start Flag" mask="0x40" name="RXS0"/>
+ <bitfield caption="USART RX Start Frame Detection Enable" mask="0x20" name="SFDE0"/>
+ </register>
+ <register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0x81" size="2" mask="0x0FFF"/>
+ <register caption="Remap Port Pins" name="REMAP" offset="0x65" size="1">
+ <bitfield caption="USART0 Pin Mapping" mask="0x01" name="U0MAP"/>
+ </register>
+ </register-group>
+ <value-group caption="" name="COMM_USART_MODE_2BIT">
+ <value caption="Asynchronous USART" name="VAL_0x00" value="0x00"/>
+ <value caption="Synchronous USART" name="VAL_0x01" value="0x01"/>
+ <value caption="Master SPI" name="VAL_0x03" value="0x03"/>
+ </value-group>
+ <value-group caption="" name="COMM_UPM_PARITY_MODE">
+ <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+ <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+ <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+ <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+ </value-group>
+ <value-group caption="" name="COMM_STOP_BIT_SEL">
+ <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+ <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+ </value-group>
+ </module>
+ <module caption="Watchdog Timer" name="WDT">
+ <register-group caption="Watchdog Timer" name="WDT">
+ <register caption="Watchdog Timer Control and Status Register" name="WDTCSR" offset="0x41" size="1">
+ <bitfield caption="Watchdog Timer Interrupt Flag" mask="0x80" name="WDIF"/>
+ <bitfield caption="Watchdog Timer Interrupt Enable" mask="0x40" name="WDIE"/>
+ <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS_32KHZ"/>
+ <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+ </register>
+ </register-group>
+ <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS_32KHZ">
+ <value caption="Oscillator Cycles 512 (16 ms)" name="VAL_0x00" value="0x00"/>
+ <value caption="Oscillator Cycles 1K (32 ms)" name="VAL_0x01" value="0x01"/>
+ <value caption="Oscillator Cycles 2K (64 ms)" name="VAL_0x02" value="0x02"/>
+ <value caption="Oscillator Cycles 4K (0.125 s)" name="VAL_0x03" value="0x03"/>
+ <value caption="Oscillator Cycles 8K (0.25 s)" name="VAL_0x04" value="0x04"/>
+ <value caption="Oscillator Cycles 16K (0.5 s)" name="VAL_0x05" value="0x05"/>
+ <value caption="Oscillator Cycles 32K (1.0 s)" name="VAL_0x06" value="0x06"/>
+ <value caption="Oscillator Cycles 64K (2.0 s)" name="VAL_0x07" value="0x07"/>
+ <value caption="Oscillator Cycles 128K (4.0 s)" name="VAL_0x08" value="0x08"/>
+ <value caption="Oscillator Cycles 256K (8.0 s)" name="VAL_0x09" value="0x09"/>
+ </value-group>
+ </module>
+ <module caption="Two Wire Serial Interface" name="TWI">
+ <register-group caption="Two Wire Serial Interface" name="TWI">
+ <register caption="TWI Slave Control Register A" name="TWSCRA" offset="0xA5" size="1">
+ <bitfield caption="TWI SDA Hold Time Enable" mask="0x80" name="TWSHE"/>
+ <bitfield caption="TWI Data Interrupt Enable" mask="0x20" name="TWDIE"/>
+ <bitfield caption="TWI Address/Stop Interrupt Enable" mask="0x10" name="TWASIE"/>
+ <bitfield caption="Two-Wire Interface Enable" mask="0x08" name="TWEN"/>
+ <bitfield caption="TWI Stop Interrupt Enable" mask="0x04" name="TWSIE"/>
+ <bitfield caption="TWI Promiscuous Mode Enable" mask="0x02" name="TWPME"/>
+ <bitfield caption="TWI Smart Mode Enable" mask="0x01" name="TWSME"/>
+ </register>
+ <register caption="TWI Slave Control Register B" name="TWSCRB" offset="0xA4" size="1">
+ <bitfield caption="TWI High Noise Mode" mask="0x08" name="TWHNM"/>
+ <bitfield caption="TWI Acknowledge Action" mask="0x04" name="TWAA"/>
+ <bitfield caption="" mask="0x03" name="TWCMD"/>
+ </register>
+ <register caption="TWI Slave Status Register A" name="TWSSRA" offset="0xA3" size="1">
+ <bitfield caption="TWI Data Interrupt Flag." mask="0x80" name="TWDIF"/>
+ <bitfield caption="TWI Address/Stop Interrupt Flag" mask="0x40" name="TWASIF"/>
+ <bitfield caption="TWI Clock Hold" mask="0x20" name="TWCH"/>
+ <bitfield caption="TWI Receive Acknowledge" mask="0x10" name="TWRA"/>
+ <bitfield caption="TWI Collision" mask="0x08" name="TWC"/>
+ <bitfield caption="TWI Bus Error" mask="0x04" name="TWBE"/>
+ <bitfield caption="TWI Read/Write Direction" mask="0x02" name="TWDIR"/>
+ <bitfield caption="TWI Address or Stop" mask="0x01" name="TWAS"/>
+ </register>
+ <register caption="TWI Slave Address Register" name="TWSA" offset="0xA2" size="1" mask="0xFF" ocd-rw="R"/>
+ <register caption="TWI Slave Data Register" name="TWSD" offset="0xA0" size="1" ocd-rw="R">
+ <bitfield caption="TWI slave data bit" mask="0xFF" name="TWSD"/>
+ </register>
+ <register caption="TWI Slave Address Mask Register" name="TWSAM" offset="0xA1" size="1">
+ <bitfield caption="TWI Address Mask Bits" mask="0xFE" name="TWSAM" lsb="1"/>
+ <bitfield caption="TWI Address Enable" mask="0x01" name="TWAE"/>
+ </register>
+ </register-group>
+ </module>
+ <module caption="Analog-to-Digital Converter" name="ADC">
+ <register-group caption="Analog-to-Digital Converter" name="ADC">
+ <register caption="The ADC multiplexer Selection Register A" name="ADMUXA" offset="0x29" size="1">
+ <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x3F" name="MUX"/>
+ </register>
+ <register caption="The ADC multiplexer Selection Register B" name="ADMUXB" offset="0x28" size="1">
+ <bitfield caption="Reference Selection Bits" mask="0xE0" name="REFS"/>
+ <bitfield caption="Gain Selection Bits" mask="0x03" name="GSEL"/>
+ </register>
+ <register caption="The ADC Control and Status register" name="ADCSRA" offset="0x25" size="1" ocd-rw="R">
+ <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+ <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+ <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
+ <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+ <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+ <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
+ </register>
+ <register caption="ADC Data Register Bytes" name="ADC" offset="0x26" size="2" mask="0xFFFF"/>
+ <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x24" size="1">
+ <bitfield caption="" mask="0x08" name="ADLAR"/>
+ <bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER_T841"/>
+ </register>
+ <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x61" size="1">
+ <bitfield caption="ADC9 Digital Input Disable" mask="0x08" name="ADC9D"/>
+ <bitfield caption="ADC8 Digital input Disable" mask="0x04" name="ADC8D"/>
+ <bitfield caption="ADC10 Digital input Disable" mask="0x02" name="ADC10D"/>
+ <bitfield caption="ADC11 Digital input Disable" mask="0x01" name="ADC11D"/>
+ </register>
+ <register caption="Digital Input Disable Register 0" name="DIDR0" offset="0x60" size="1">
+ <bitfield caption="ADC7 Digital input Disable" mask="0x80" name="ADC7D"/>
+ <bitfield caption="ADC6 Digital input Disable" mask="0x40" name="ADC6D"/>
+ <bitfield caption="ADC5 Digital input Disable" mask="0x20" name="ADC5D"/>
+ <bitfield caption="ADC4/AIN11 Digital input Disable" mask="0x10" name="ADC4D"/>
+ <bitfield caption="ADC3/AIN10 Digital Input Disable" mask="0x08" name="ADC3D"/>
+ <bitfield caption="ADC2/AIN01 Digital input Disable" mask="0x04" name="ADC2D"/>
+ <bitfield caption="ADC1/AIN00 Digital input Disable" mask="0x02" name="ADC1D"/>
+ <bitfield caption="ADC0/AREF Digital input Disable" mask="0x01" name="ADC0D"/>
+ </register>
+ </register-group>
+ <value-group caption="" name="ANALOG_ADC_PRESCALER">
+ <value caption="2" name="VAL_0x00" value="0x00"/>
+ <value caption="2" name="VAL_0x01" value="0x01"/>
+ <value caption="4" name="VAL_0x02" value="0x02"/>
+ <value caption="8" name="VAL_0x03" value="0x03"/>
+ <value caption="16" name="VAL_0x04" value="0x04"/>
+ <value caption="32" name="VAL_0x05" value="0x05"/>
+ <value caption="64" name="VAL_0x06" value="0x06"/>
+ <value caption="128" name="VAL_0x07" value="0x07"/>
+ </value-group>
+ <value-group caption="" name="ANALOG_ADC_AUTO_TRIGGER_T841">
+ <value caption="Free Running mode" name="VAL_0x00" value="0x00"/>
+ <value caption="Analog Comparator 0" name="VAL_0x01" value="0x01"/>
+ <value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
+ <value caption="Timer/Counter0 Compare Match A" name="VAL_0x03" value="0x03"/>
+ <value caption="Timer/Counter0 Overflow" name="VAL_0x04" value="0x04"/>
+ <value caption="Timer/Counter1 Compare Match A" name="VAL_0x05" value="0x05"/>
+ <value caption="Timer/Counter1 Overflow" name="VAL_0x06" value="0x06"/>
+ <value caption="Timer/Counter1 Capture Event" name="VAL_0x07" value="0x07"/>
+ </value-group>
+ </module>
+ <module caption="Analog Comparator" name="AC">
+ <register-group caption="Analog Comparator" name="AC">
+ <register caption="Analog Comparator 0 Control And Status Register B" name="ACSR0B" offset="0x2B" size="1">
+ <bitfield caption="Analog Comparator 0 Hysteresis Select" mask="0x80" name="HSEL0"/>
+ <bitfield caption="Analog Comparator 0 Hysteresis Level" mask="0x40" name="HLEV0"/>
+ <bitfield caption="Analog Comparator 0 Output Pin Enable" mask="0x10" name="ACOE0"/>
+ <bitfield caption="Analog Comparator 0 Negative Input Multiplexer" mask="0x0C" name="ACNMUX"/>
+ <bitfield caption="Analog Comparator 0 Positive Input Multiplexer Bits 1:0" mask="0x03" name="ACPMUX"/>
+ </register>
+ <register caption="Analog Comparator 0 Control And Status Register A" name="ACSR0A" offset="0x2A" size="1">
+ <bitfield caption="Analog Comparator 0 Disable" mask="0x80" name="ACD0"/>
+ <bitfield caption="Analog Comparator 0 Positive Input Multiplexer Bit 2" mask="0x40" name="ACPMUX2"/>
+ <bitfield caption="Analog Comparator 0 Output" mask="0x20" name="ACO0"/>
+ <bitfield caption="Analog Comparator 0 Interrupt Flag" mask="0x10" name="ACI0"/>
+ <bitfield caption="Analog Comparator 0 Interrupt Enable" mask="0x08" name="ACIE0"/>
+ <bitfield caption="Analog Comparator 0 Input Capture Enable" mask="0x04" name="ACIC0"/>
+ <bitfield caption="Analog Comparator 0 Interrupt Mode Select bits" mask="0x03" name="ACIS0" values="ANALOG_COMP_INTERRUPT"/>
+ </register>
+ <register caption="Analog Comparator 1 Control And Status Register B" name="ACSR1B" offset="0x2D" size="1">
+ <bitfield caption="Analog Comparator 1 Hysteresis Select" mask="0x80" name="HSEL1"/>
+ <bitfield caption="Analog Comparator 1 Hysteresis Level" mask="0x40" name="HLEV1"/>
+ <bitfield caption="Analog Comparator 1 Output Pin Enable" mask="0x10" name="ACOE1"/>
+ <bitfield caption="Analog Comparator 1 Multiplexer Enable" mask="0x04" name="ACME1"/>
+ </register>
+ <register caption="Analog Comparator 1 Control And Status Register A" name="ACSR1A" offset="0x2C" size="1">
+ <bitfield caption="Analog Comparator 1 Disable" mask="0x80" name="ACD1"/>
+ <bitfield caption="Analog Comparator 1 Bandgap Select" mask="0x40" name="ACBG1"/>
+ <bitfield caption="Analog Comparator 1 Output" mask="0x20" name="ACO1"/>
+ <bitfield caption="Analog Comparator 1 Interrupt Flag" mask="0x10" name="ACI1"/>
+ <bitfield caption="Analog Comparator 1 Interrupt Enable" mask="0x08" name="ACIE1"/>
+ <bitfield caption="Analog Comparator 1 Input Capture Enable" mask="0x04" name="ACIC1"/>
+ <bitfield caption="Analog Comparator 1 Interrupt Mode Select bits" mask="0x03" name="ACIS1" values="ANALOG_COMP_INTERRUPT"/>
+ </register>
+ </register-group>
+ <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+ <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+ <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+ <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+ <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+ </value-group>
+ </module>
+ <module caption="EEPROM" name="EEPROM">
+ <register-group caption="EEPROM" name="EEPROM">
+ <register caption="EEPROM Address Register Bytes" name="EEAR" offset="0x3E" size="2" mask="0x01FF"/>
+ <register caption="EEPROM Data Register" name="EEDR" offset="0x3D" size="1" mask="0xFF"/>
+ <register caption="EEPROM Control Register" name="EECR" offset="0x3C" size="1">
+ <bitfield caption="EEPROM Programming Mode Bits" mask="0x30" name="EEPM" values="EEP_MODE"/>
+ <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+ <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMPE"/>
+ <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEPE"/>
+ <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+ </register>
+ </register-group>
+ <value-group caption="" name="EEP_MODE">
+ <value caption="Erase and Write in one operation" name="VAL_0x00" value="0x00"/>
+ <value caption="Erase Only" name="VAL_0x01" value="0x01"/>
+ <value caption="Write Only" name="VAL_0x02" value="0x02"/>
+ </value-group>
+ </module>
+ <module caption="Timer/Counter, 16-bit" name="TC16">
+ <register-group caption="Timer/Counter, 16-bit" name="TC1">
+ <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x2F" size="1">
+ <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+ <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+ <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
+ <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+ </register>
+ <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x2E" size="1" ocd-rw="R">
+ <bitfield caption="Timer/Counter1 Input Capture Flag" mask="0x20" name="ICF1"/>
+ <bitfield caption="Timer/Counter1 Output Compare B Match Flag" mask="0x04" name="OCF1B"/>
+ <bitfield caption="Timer/Counter1 Output Compare A Match Flag" mask="0x02" name="OCF1A"/>
+ <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+ </register>
+ <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x4F" size="1">
+ <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+ <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+ <bitfield caption="Pulse Width Modulator Select Bits" mask="0x03" name="WGM1"/>
+ </register>
+ <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x4E" size="1">
+ <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+ <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+ <bitfield caption="Waveform Generation Mode Bits" mask="0x18" name="WGM1" lsb="2"/>
+ <bitfield caption="Clock Select bits" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
+ </register>
+ <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x42" size="1" ocd-rw="">
+ <bitfield caption="Force Output Compare for Channel A" mask="0x80" name="FOC1A"/>
+ <bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC1B"/>
+ </register>
+ <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x4C" size="2" mask="0xFFFF"/>
+ <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x4A" size="2" mask="0xFFFF"/>
+ <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x48" size="2" mask="0xFFFF"/>
+ <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x44" size="2" mask="0xFFFF"/>
+ <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+ <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+ <bitfield caption="Prescaler Reset Timer/CounterN" mask="0x01" name="PSR"/>
+ </register>
+ </register-group>
+ <register-group caption="Timer/Counter, 16-bit" name="TC2">
+ <register caption="Timer/Counter2 Interrupt Mask Register" name="TIMSK2" offset="0x31" size="1">
+ <bitfield caption="Timer/Counter2 Input Capture Interrupt Enable" mask="0x20" name="ICIE2"/>
+ <bitfield caption="Timer/Counter2 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE2B"/>
+ <bitfield caption="Timer/Counter2 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE2A"/>
+ <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
+ </register>
+ <register caption="Timer/Counter Interrupt Flag register" name="TIFR2" offset="0x30" size="1" ocd-rw="R">
+ <bitfield caption="Timer/Counter2 Input Capture Flag" mask="0x20" name="ICF2"/>
+ <bitfield caption="Timer/Counter2 Output Compare B Match Flag" mask="0x04" name="OCF2B"/>
+ <bitfield caption="Timer/Counter2 Output Compare A Match Flag" mask="0x02" name="OCF2A"/>
+ <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
+ </register>
+ <register caption="Timer/Counter2 Control Register A" name="TCCR2A" offset="0xCA" size="1">
+ <bitfield caption="Compare Output Mode 2A, bits" mask="0xC0" name="COM2A"/>
+ <bitfield caption="Compare Output Mode 2B, bits" mask="0x30" name="COM2B"/>
+ <bitfield caption="Pulse Width Modulator Select Bits" mask="0x03" name="WGM2"/>
+ </register>
+ <register caption="Timer/Counter2 Control Register B" name="TCCR2B" offset="0xC9" size="1">
+ <bitfield caption="Input Capture 2 Noise Canceler" mask="0x80" name="ICNC2"/>
+ <bitfield caption="Input Capture 2 Edge Select" mask="0x40" name="ICES2"/>
+ <bitfield caption="Waveform Generation Mode Bits" mask="0x18" name="WGM2" lsb="2"/>
+ <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT_EXT"/>
+ </register>
+ <register caption="Timer/Counter2 Control Register C" name="TCCR2C" offset="0xC8" size="1" ocd-rw="">
+ <bitfield caption="Force Output Compare for Channel A" mask="0x80" name="FOC2A"/>
+ <bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC2B"/>
+ </register>
+ <register caption="Timer/Counter2 Bytes" name="TCNT2" offset="0xC6" size="2" mask="0xFFFF"/>
+ <register caption="Timer/Counter2 Output Compare Register A Bytes" name="OCR2A" offset="0xC4" size="2" mask="0xFFFF"/>
+ <register caption="Timer/Counter2 Output Compare Register B Bytes" name="OCR2B" offset="0xC2" size="2" mask="0xFFFF"/>
+ <register caption="Timer/Counter2 Input Capture Register Bytes" name="ICR2" offset="0xC0" size="2" mask="0xFFFF"/>
+ <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+ <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+ <bitfield caption="Prescaler Reset Timer/CounterN" mask="0x01" name="PSR"/>
+ </register>
+ </register-group>
+ <value-group caption="" name="CLK_SEL_3BIT_EXT">
+ <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+ <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+ <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+ <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+ <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+ <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+ <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+ <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+ </value-group>
+ </module>
+ <module caption="Timer/Counter, 8-bit" name="TC8">
+ <register-group caption="Timer/Counter, 8-bit" name="TC0">
+ <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK0" offset="0x59" size="1">
+ <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE0B"/>
+ <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE0A"/>
+ <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+ </register>
+ <register caption="Timer/Counter0 Interrupt Flag Register" name="TIFR0" offset="0x58" size="1" ocd-rw="R">
+ <bitfield caption="Timer/Counter0 Output Compare Flag B" mask="0x04" name="OCF0B"/>
+ <bitfield caption="Timer/Counter0 Output Compare Flag A" mask="0x02" name="OCF0A"/>
+ <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+ </register>
+ <register caption="Timer/Counter Control Register A" name="TCCR0A" offset="0x50" size="1">
+ <bitfield caption="Compare Match Output A Mode bits" mask="0xC0" name="COM0A"/>
+ <bitfield caption="Compare Match Output B Mode bits" mask="0x30" name="COM0B"/>
+ <bitfield caption="Waveform Generation Mode bits" mask="0x03" name="WGM0"/>
+ </register>
+ <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x53" size="1">
+ <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
+ <bitfield caption="Force Output Compare B" mask="0x40" name="FOC0B"/>
+ <bitfield caption="Waveform Generation Mode bit 2" mask="0x08" name="WGM02"/>
+ <bitfield caption="Clock Select bits" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+ </register>
+ <register caption="Timer/Counter0" name="TCNT0" offset="0x52" size="1" mask="0xFF"/>
+ <register caption="Timer/Counter0 Output Compare Register A" name="OCR0A" offset="0x56" size="1" mask="0xFF"/>
+ <register caption="Timer/Counter0 Output Compare Register B" name="OCR0B" offset="0x5C" size="1" mask="0xFF"/>
+ <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+ <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+ <bitfield caption="Prescaler Reset Timer/CounterN" mask="0x01" name="PSR"/>
+ </register>
+ </register-group>
+ <value-group caption="" name="CLK_SEL_3BIT_EXT">
+ <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+ <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+ <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+ <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+ <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+ <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+ <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+ <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+ </value-group>
+ </module>
+ <module caption="External Interrupts" name="EXINT">
+ <register-group caption="External Interrupts" name="EXINT">
+ <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+ <bitfield caption="Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
+ <bitfield caption="Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00" values="INTERRUPT_SENSE_CONTROL"/>
+ </register>
+ <register caption="General Interrupt Mask Register" name="GIMSK" offset="0x5B" size="1">
+ <bitfield caption="External Interrupt Request 0 Enable" mask="0x40" name="INT0"/>
+ <bitfield caption="Pin Change Interrupt Enables" mask="0x30" name="PCIE"/>
+ </register>
+ <register caption="General Interrupt Flag register" name="GIFR" offset="0x5A" size="1" ocd-rw="R">
+ <bitfield caption="External Interrupt Flag 0" mask="0x40" name="INTF0"/>
+ <bitfield caption="Pin Change Interrupt Flags" mask="0x30" name="PCIF"/>
+ </register>
+ <register caption="Pin Change Enable Mask 1" name="PCMSK1" offset="0x40" size="1" mask="0x0F">
+ <bitfield caption="Pin Change Enable Mask 1 Bit 0" mask="0x01" name="PCINT8"/>
+ <bitfield caption="Pin Change Enable Mask 1 Bit 1" mask="0x02" name="PCINT9"/>
+ <bitfield caption="Pin Change Enable Mask 1 Bit 2" mask="0x04" name="PCINT10"/>
+ <bitfield caption="Pin Change Enable Mask 1 Bit 3" mask="0x08" name="PCINT11"/>
+ </register>
+ <register caption="Pin Change Enable Mask 0" name="PCMSK0" offset="0x32" size="1" mask="0xFF">
+ <bitfield caption="Pin Change Enable Mask 0 Bit 0" mask="0x01" name="PCINT0"/>
+ <bitfield caption="Pin Change Enable Mask 0 Bit 1" mask="0x02" name="PCINT1"/>
+ <bitfield caption="Pin Change Enable Mask 0 Bit 2" mask="0x04" name="PCINT2"/>
+ <bitfield caption="Pin Change Enable Mask 0 Bit 3" mask="0x08" name="PCINT3"/>
+ <bitfield caption="Pin Change Enable Mask 0 Bit 4" mask="0x10" name="PCINT4"/>
+ <bitfield caption="Pin Change Enable Mask 0 Bit 5" mask="0x20" name="PCINT5"/>
+ <bitfield caption="Pin Change Enable Mask 0 Bit 6" mask="0x40" name="PCINT6"/>
+ <bitfield caption="Pin Change Enable Mask 0 Bit 7" mask="0x80" name="PCINT7"/>
+ </register>
+ </register-group>
+ <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+ <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+ <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+ <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+ <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+ </value-group>
+ </module>
+ <module caption="CPU Registers" name="CPU">
+ <register-group caption="CPU Registers" name="CPU">
+ <register caption="Power Reduction Register" name="PRR" offset="0x70" size="1">
+ <bitfield caption="Power Reduction TWI" mask="0x80" name="PRTWI"/>
+ <bitfield caption="Power Reduction USART1" mask="0x40" name="PRUSART1"/>
+ <bitfield caption="Power Reduction USART0" mask="0x20" name="PRUSART0"/>
+ <bitfield caption="Power Reduction SPI" mask="0x10" name="PRSPI"/>
+ <bitfield caption="Power Reduction Timer/Counter2" mask="0x08" name="PRTIM2"/>
+ <bitfield caption="Power Reduction Timer/Counter1" mask="0x04" name="PRTIM1"/>
+ <bitfield caption="Power Reduction Timer/Counter0" mask="0x02" name="PRTIM0"/>
+ <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+ </register>
+ <register caption="Configuration Change Protection" name="CCP" offset="0x71" size="1" mask="0xFF"/>
+ <register caption="Clock Prescale Register" name="CLKPR" offset="0x73" size="1">
+ <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+ </register>
+ <register caption="Clock Control Register" name="CLKCR" offset="0x72" size="1">
+ <bitfield caption="Oscillator Ready" mask="0x80" name="OSCRDY"/>
+ <bitfield caption="Clock Switch Trigger" mask="0x40" name="CSTR"/>
+ <bitfield caption="Clock Output (Copy). Active low." mask="0x20" name="CKOUTC"/>
+ <bitfield caption="Start-up Time" mask="0x10" name="SUT"/>
+ <bitfield caption="Clock Select Bits" mask="0x0F" name="CKSEL"/>
+ </register>
+ <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+ <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+ <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+ <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+ <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+ <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+ <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+ <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+ <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+ </register>
+ <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0x07FF"/>
+ <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+ <bitfield caption="Sleep Enable" mask="0x20" name="SE"/>
+ <bitfield caption="Sleep Mode Select Bits" mask="0x18" name="SM" values="CPU_SLEEP_MODE"/>
+ <bitfield caption="Interrupt Sense Control 0 bits" mask="0x03" name="ISC0"/>
+ </register>
+ <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+ <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+ <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+ <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+ <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+ </register>
+ <register caption="General Purpose I/O Register 2" name="GPIOR2" offset="0x35" size="1" mask="0xFF"/>
+ <register caption="General Purpose I/O Register 1" name="GPIOR1" offset="0x34" size="1" mask="0xFF"/>
+ <register caption="General Purpose I/O Register 0" name="GPIOR0" offset="0x33" size="1" mask="0xFF"/>
+ <register caption="Store Program Memory Control and Status Register" name="SPMCSR" offset="0x57" size="1" ocd-rw="R">
+ <bitfield caption="Read Device Signature Imprint Table" mask="0x20" name="RSIG"/>
+ <bitfield caption="Clear Temporary Page Buffer" mask="0x10" name="CTPB"/>
+ <bitfield caption="Read Fuse and Lock Bits" mask="0x08" name="RFLB"/>
+ <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+ <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+ <bitfield caption="Store program Memory Enable" mask="0x01" name="SPMEN"/>
+ </register>
+ <register caption="Oscillator Calibration Register 8MHz" name="OSCCAL0" offset="0x74" size="1" mask="0xFF"/>
+ <register caption="Oscillator Calibration Register 32kHz" name="OSCCAL1" offset="0x77" size="1" mask="0x03"/>
+ <register caption="Oscillator Temperature Calibration Register A" name="OSCTCAL0A" offset="0x75" size="1" mask="0xFF"/>
+ <register caption="Oscillator Temperature Calibration Register B" name="OSCTCAL0B" offset="0x76" size="1" mask="0xFF"/>
+ </register-group>
+ <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+ <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+ <value value="0x03" caption="32 kHz" name="32_kHz"/>
+ </value-group>
+ <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+ <value caption="1" name="VAL_0x00" value="0x00"/>
+ <value caption="2" name="VAL_0x01" value="0x01"/>
+ <value caption="4" name="VAL_0x02" value="0x02"/>
+ <value caption="8" name="VAL_0x03" value="0x03"/>
+ <value caption="16" name="VAL_0x04" value="0x04"/>
+ <value caption="32" name="VAL_0x05" value="0x05"/>
+ <value caption="64" name="VAL_0x06" value="0x06"/>
+ <value caption="128" name="VAL_0x07" value="0x07"/>
+ <value caption="256" name="VAL_0x08" value="0x08"/>
+ </value-group>
+ <value-group caption="" name="CPU_SLEEP_MODE">
+ <value caption="Idle" name="IDLE" value="0x00"/>
+ <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+ <value caption="Power Down" name="PDOWN" value="0x02"/>
+ <value caption="Standby" name="STDBY" value="0x03"/>
+ </value-group>
+
+ </module>
+ <module caption="Timer/Counter Output Compare Pin" name="TOCPM">
+ <register-group caption="Timer/Counter Output Compare Pin" name="TOCPM">
+ <register caption="Timer Output Compare Pin Mux Selection 1" name="TOCPMSA1" offset="0x68" size="1">
+ <bitfield caption="Timer Output Compare Channel 7 Selection Bits" mask="0xC0" name="TOCC7S"/>
+ <bitfield caption="Timer Output Compare Channel 6 Selection Bits" mask="0x30" name="TOCC6S"/>
+ <bitfield caption="Timer Output Compare Channel 5 Selection Bits" mask="0x0C" name="TOCC5S"/>
+ <bitfield caption="Timer Output Compare Channel 4 Selection Bits" mask="0x03" name="TOCC4S"/>
+ </register>
+ <register caption="Timer Output Compare Pin Mux Selection 0" name="TOCPMSA0" offset="0x67" size="1">
+ <bitfield caption="Timer Output Compare Channel 3 Selection Bits" mask="0xC0" name="TOCC3S"/>
+ <bitfield caption="Timer Output Compare Channel 2 Selection Bits" mask="0x30" name="TOCC2S"/>
+ <bitfield caption="Timer Output Compare Channel 1 Selection Bits" mask="0x0C" name="TOCC1S"/>
+ <bitfield caption="Timer Output Compare Channel 0 Selection Bits" mask="0x03" name="TOCC0S"/>
+ </register>
+ <register caption="Timer Output Compare Pin Mux Channel Output Enable" name="TOCPMCOE" offset="0x66" size="1">
+ <bitfield caption="Timer Output Compare Channel 7 Output Enable" mask="0x80" name="TOCC7OE"/>
+ <bitfield caption="Timer Output Compare Channel 6 Output Enable" mask="0x40" name="TOCC6OE"/>
+ <bitfield caption="Timer Output Compare Channel 5 Output Enable" mask="0x20" name="TOCC5OE"/>
+ <bitfield caption="Timer Output Compare Channel 4 Output Enable" mask="0x10" name="TOCC4OE"/>
+ <bitfield caption="Timer Output Compare Channel 3 Output Enable" mask="0x08" name="TOCC3OE"/>
+ <bitfield caption="Timer Output Compare Channel 2 Output Enable" mask="0x04" name="TOCC2OE"/>
+ <bitfield caption="Timer Output Compare Channel 1 Output Enable" mask="0x02" name="TOCC1OE"/>
+ <bitfield caption="Timer Output Compare Channel 0 Output Enable" mask="0x01" name="TOCC0OE"/>
+ </register>
+ </register-group>
+ </module>
+ <module caption="Serial Peripheral Interface" name="SPI">
+ <register-group caption="Serial Peripheral Interface" name="SPI">
+ <register caption="SPI Control Register" name="SPCR" offset="0xB2" size="1">
+ <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+ <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+ <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+ <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+ <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+ <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+ <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE"/>
+ </register>
+ <register caption="SPI Status Register" name="SPSR" offset="0xB1" size="1">
+ <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+ <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+ <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+ </register>
+ <register caption="SPI Data Register" name="SPDR" offset="0xB0" size="1" mask="0xFF"/>
+ <register caption="Remap Port Pins" name="REMAP" offset="0x65" size="1">
+ <bitfield caption="SPI Pin Mapping" mask="0x02" name="SPIMAP"/>
+ </register>
+ </register-group>
+ <value-group caption="" name="COMM_SCK_RATE">
+ <value caption="fcl/4" name="VAL_0x00" value="0x00"/>
+ <value caption="fcl/16" name="VAL_0x01" value="0x01"/>
+ <value caption="fcl/64" name="VAL_0x02" value="0x02"/>
+ <value caption="fcl/128" name="VAL_0x03" value="0x03"/>
+ </value-group>
+ </module>
+ </modules>
+ <pinouts>
+ <pinout name="SOIC_14">
+ <pin pad="GND" position="14"/>
+ <pin pad="PA0" position="13"/>
+ <pin pad="PA1" position="12"/>
+ <pin pad="PA2" position="11"/>
+ <pin pad="PA3" position="10"/>
+ <pin pad="PA4" position="9"/>
+ <pin pad="PA5" position="8"/>
+ <pin pad="PA6" position="7"/>
+ <pin pad="PA7" position="6"/>
+ <pin pad="PB2" position="5"/>
+ <pin pad="PB3" position="4"/>
+ <pin pad="PB1" position="3"/>
+ <pin pad="PB0" position="2"/>
+ <pin pad="VCC" position="1"/>
+ </pinout>
+ <pinout name="QFN_20">
+ <pin pad="PA4" position="1"/>
+ <pin pad="PA3" position="2"/>
+ <pin pad="PA2" position="3"/>
+ <pin pad="PA1" position="4"/>
+ <pin pad="PA0" position="5"/>
+ <pin pad="GND" position="8"/>
+ <pin pad="VCC" position="9"/>
+ <pin pad="PB0" position="11"/>
+ <pin pad="PB1" position="12"/>
+ <pin pad="PB3" position="13"/>
+ <pin pad="PB2" position="14"/>
+ <pin pad="PA7" position="15"/>
+ <pin pad="PA6" position="16"/>
+ <pin pad="PA5" position="20"/>
+ </pinout>
+ </pinouts>
+</avr-tools-device-file><
\ No newline at end of file
A vendor/attiny861.atdf => vendor/attiny861.atdf +939 -0
@@ 0,0 1,939 @@
+<?xml version="1.0" encoding="UTF-8"?><avr-tools-device-file xmlns:xalan="http://xml.apache.org/xalan" xmlns:NumHelper="NumHelper" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" schema-version="0.3" xsi:noNamespaceSchemaLocation="../../schema/avr_tools_device_file.xsd">
+ <variants>
+ <variant ordercode="ATtiny861V-10MU" package="MLF32" pinout="QFN_32" speedmax="10000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+ <variant ordercode="ATtiny861V-10PU" package="PDIP20" pinout="SOIC_20" speedmax="10000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+ <variant ordercode="ATtiny861V-10SU" package="SOIC20" pinout="SOIC_20" speedmax="10000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+ <variant ordercode="ATtiny861-20MU" package="MLF32" pinout="QFN_32" speedmax="20000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="2.7"/>
+ <variant ordercode="ATtiny861-20PU" package="PDIP20" pinout="SOIC_20" speedmax="20000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="2.7"/>
+ <variant ordercode="ATtiny861-20SU" package="SOIC20" pinout="SOIC_20" speedmax="20000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="2.7"/>
+ </variants>
+ <devices>
+ <device name="ATtiny861" architecture="AVR8" family="tinyAVR">
+ <address-spaces>
+ <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x2000">
+ <memory-segment start="0x0000" size="0x2000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x40"/>
+ </address-space>
+ <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+ <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+ </address-space>
+ <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+ <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+ </address-space>
+ <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+ <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+ </address-space>
+ <address-space endianness="little" name="data" id="data" start="0x0000" size="0x0260">
+ <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+ <memory-segment name="MAPPED_IO" start="0x0020" size="0x0040" type="io" external="false"/>
+ <memory-segment name="IRAM" start="0x0060" size="0x0200" type="ram" external="false"/>
+ </address-space>
+ <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0200">
+ <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
+ </address-space>
+ <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+ <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+ <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+ </address-space>
+ </address-spaces>
+ <peripherals>
+ <module name="PORT">
+ <instance name="PORTA" caption="I/O Port">
+ <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
+ <signals>
+ <signal function="PORTA" group="P" index="0" pad="PA0"/>
+ <signal function="PORTA" group="P" index="1" pad="PA1"/>
+ <signal function="PORTA" group="P" index="2" pad="PA2"/>
+ <signal function="PORTA" group="P" index="3" pad="PA3"/>
+ <signal function="PORTA" group="P" index="4" pad="PA4"/>
+ <signal function="PORTA" group="P" index="5" pad="PA5"/>
+ <signal function="PORTA" group="P" index="6" pad="PA6"/>
+ <signal function="PORTA" group="P" index="7" pad="PA7"/>
+ </signals>
+ </instance>
+ <instance name="PORTB" caption="I/O Port">
+ <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
+ <signals>
+ <signal function="PORTB" group="P" index="0" pad="PB0"/>
+ <signal function="PORTB" group="P" index="1" pad="PB1"/>
+ <signal function="PORTB" group="P" index="2" pad="PB2"/>
+ <signal function="PORTB" group="P" index="3" pad="PB3"/>
+ <signal function="PORTB" group="P" index="4" pad="PB4"/>
+ <signal function="PORTB" group="P" index="5" pad="PB5"/>
+ <signal function="PORTB" group="P" index="6" pad="PB6"/>
+ <signal function="PORTB" group="P" index="7" pad="PB7"/>
+ </signals>
+ </instance>
+ </module>
+ <module name="ADC">
+ <instance name="ADC" caption="Analog-to-Digital Converter">
+ <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
+ <signals>
+ <signal function="ADC" group="ADC" index="0" pad="PA0"/>
+ <signal function="ADC" group="ADC" index="1" pad="PA1"/>
+ <signal function="ADC" group="ADC" index="2" pad="PA2"/>
+ <signal function="ADC" group="ADC" index="3" pad="PA4"/>
+ <signal function="ADC" group="ADC" index="4" pad="PA5"/>
+ <signal function="ADC" group="ADC" index="5" pad="PA6"/>
+ <signal function="ADC" group="ADC" index="6" pad="PA7"/>
+ <signal function="ADC" group="ADC" index="7" pad="PB4"/>
+ <signal function="ADC" group="ADC" index="8" pad="PB5"/>
+ <signal function="ADC" group="ADC" index="9" pad="PB6"/>
+ <signal function="ADC" group="ADC" index="10" pad="PB7"/>
+ <signal function="AREF" group="AREF" pad="PA3"/>
+ </signals>
+ </instance>
+ </module>
+ <module name="AC">
+ <instance name="AC" caption="Analog Comparator">
+ <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
+ <signals>
+ <signal function="ACIN" group="AIN" index="0" pad="PA7"/>
+ <signal function="ACIN" group="AIN" index="1" pad="PA6"/>
+ <signal function="ACIN" group="AIN" index="2" pad="PA5"/>
+ </signals>
+ </instance>
+ </module>
+ <module name="USI">
+ <instance name="USI" caption="Universal Serial Interface">
+ <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data" caption="Universal Serial Interface"/>
+ <signals>
+ <signal field="USIPOS" function="USI" group="SDA" pad="PB0"/>
+ <signal field="USIPOS" function="USI" group="SCL" pad="PB2"/>
+ <signal field="USIPOS" function="USI_ALT" group="SCL " pad="PA2"/>
+ <signal field="USIPOS" function="USI_ALT" group="SDA" pad="PA0"/>
+ <signal field="USIPOS" function="USI" group="DI" pad="PB0"/>
+ <signal field="USIPOS" function="USI" group="DO" pad="PB1"/>
+ <signal field="USIPOS" function="USI" group="USCK" pad="PB2"/>
+ <signal field="USIPOS" function="USI_ALT" group="USCK" pad="PA2"/>
+ <signal field="USIPOS" function="USI_ALT" group="DO" pad="PA1"/>
+ <signal field="USIPOS" function="USI_ALT" group="DI" pad="PA0"/>
+ </signals>
+ </instance>
+ </module>
+ <module name="EEPROM">
+ <instance name="EEPROM" caption="EEPROM">
+ <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
+ </instance>
+ </module>
+ <module name="WDT">
+ <instance name="WDT" caption="Watchdog Timer">
+ <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
+ </instance>
+ </module>
+ <module name="TC8">
+ <instance name="TC0" caption="Timer/Counter, 8-bit">
+ <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
+ <signals>
+ <signal function="T0" group="ICP0" pad="PA4"/>
+ <signal function="T0" group="T0" pad="PB6"/>
+ </signals>
+ </instance>
+ </module>
+ <module name="TC16">
+ <instance name="TC1" caption="Timer/Counter, 16-bit">
+ <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
+ <signals>
+ <signal function="T1" group="OC1AINV" pad="PB0"/>
+ <signal function="T1" group="OC1A" pad="PB1"/>
+ <signal function="T1" group="OC1BINV" pad="PB2"/>
+ <signal function="T1" group="OC1B" pad="PB3"/>
+ <signal function="T1" group="OC1DINV" pad="PB4"/>
+ <signal function="T1" group="OC1D" pad="PB5"/>
+ </signals>
+ </instance>
+ </module>
+ <module name="BOOT_LOAD">
+ <instance name="BOOT_LOAD" caption="Bootloader">
+ <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
+ </instance>
+ </module>
+ <module name="EXINT">
+ <instance name="EXINT" caption="External Interrupts">
+ <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
+ <signals>
+ <signal function="EXTINT" group="PCINT" index="0" pad="PA0"/>
+ <signal function="EXTINT" group="PCINT" index="1" pad="PA1"/>
+ <signal function="EXTINT" group="PCINT" index="2" pad="PA2"/>
+ <signal function="EXTINT" group="PCINT" index="3" pad="PA3"/>
+ <signal function="EXTINT" group="PCINT" index="4" pad="PA4"/>
+ <signal function="EXTINT" group="PCINT" index="5" pad="PA5"/>
+ <signal function="EXTINT" group="PCINT" index="6" pad="PA6"/>
+ <signal function="EXTINT" group="PCINT" index="7" pad="PA7"/>
+ <signal function="EXTINT" group="PCINT" index="8" pad="PB0"/>
+ <signal function="EXTINT" group="PCINT" index="9" pad="PB1"/>
+ <signal function="EXTINT" group="PCINT" index="10" pad="PB2"/>
+ <signal function="EXTINT" group="PCINT" index="11" pad="PB3"/>
+ <signal function="EXTINT" group="PCINT" index="12" pad="PB4"/>
+ <signal function="EXTINT" group="PCINT" index="13" pad="PB5"/>
+ <signal function="EXTINT" group="PCINT" index="14" pad="PB6"/>
+ <signal function="EXTINT" group="PCINT" index="15" pad="PB7"/>
+ <signal function="EXTINT" group="INT" index="1" pad="PA2"/>
+ <signal function="EXTINT" group="INT" index="0" pad="PB6"/>
+ </signals>
+ </instance>
+ </module>
+ <module name="CPU">
+ <instance name="CPU" caption="CPU Registers">
+ <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
+ <parameters>
+ <param name="CORE_VERSION" value="V2"/>
+ <param name="NEW_INSTRUCTIONS" value="lpm rd,z+"/>
+ </parameters></instance>
+ </module>
+ <module name="FUSE">
+ <instance name="FUSE" caption="Fuses">
+ <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
+ </instance>
+ </module>
+ <module name="LOCKBIT">
+ <instance name="LOCKBIT" caption="Lockbits">
+ <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
+ </instance>
+ </module>
+ </peripherals>
+ <interrupts>
+ <interrupt index="0" name="RESET" caption="External Reset, Power-on Reset and Watchdog Reset"/>
+ <interrupt index="1" name="INT0" caption="External Interrupt 0"/>
+ <interrupt index="2" name="PCINT" caption="Pin Change Interrupt"/>
+ <interrupt index="3" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match 1A"/>
+ <interrupt index="4" name="TIMER1_COMPB" caption="Timer/Counter1 Compare Match 1B"/>
+ <interrupt index="5" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+ <interrupt index="6" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+ <interrupt index="7" name="USI_START" caption="USI Start"/>
+ <interrupt index="8" name="USI_OVF" caption="USI Overflow"/>
+ <interrupt index="9" name="EE_RDY" caption="EEPROM Ready"/>
+ <interrupt index="10" name="ANA_COMP" caption="Analog Comparator"/>
+ <interrupt index="11" name="ADC" caption="ADC Conversion Complete"/>
+ <interrupt index="12" name="WDT" caption="Watchdog Time-Out"/>
+ <interrupt index="13" name="INT1" caption="External Interrupt 1"/>
+ <interrupt index="14" name="TIMER0_COMPA" caption="Timer/Counter0 Compare Match A"/>
+ <interrupt index="15" name="TIMER0_COMPB" caption="Timer/Counter0 Compare Match B"/>
+ <interrupt index="16" name="TIMER0_CAPT" caption="ADC Conversion Complete"/>
+ <interrupt index="17" name="TIMER1_COMPD" caption="Timer/Counter1 Compare Match D"/>
+ <interrupt index="18" name="FAULT_PROTECTION" caption="Timer/Counter1 Fault Protection"/>
+ </interrupts>
+ <interfaces>
+ <interface name="ISP" type="isp"/>
+ <interface name="HVPP" type="hvpp"/>
+ <interface name="debugWIRE" type="dw"/>
+ </interfaces>
+ <property-groups>
+ <property-group name="SIGNATURES">
+ <property name="JTAGID" value="0x930D"/>
+ <property name="SIGNATURE0" value="0x1e"/>
+ <property name="SIGNATURE1" value="0x93"/>
+ <property name="SIGNATURE2" value="0x0d"/>
+ </property-group>
+ <property-group name="OCD">
+ <property name="OCD_REVISION" value="1"/>
+ <property name="OCD_DATAREG" value="0x20"/>
+ <property name="PROGBASE" value="0x0000"/>
+ </property-group>
+ <property-group name="JTAG_INTERFACE">
+ <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+ </property-group>
+ <property-group name="ISP_INTERFACE">
+ <property name="IspEnterProgMode_timeout" value="200"/>
+ <property name="IspEnterProgMode_stabDelay" value="100"/>
+ <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+ <property name="IspEnterProgMode_synchLoops" value="32"/>
+ <property name="IspEnterProgMode_byteDelay" value="0"/>
+ <property name="IspEnterProgMode_pollIndex" value="3"/>
+ <property name="IspEnterProgMode_pollValue" value="0x53"/>
+ <property name="IspLeaveProgMode_preDelay" value="1"/>
+ <property name="IspLeaveProgMode_postDelay" value="1"/>
+ <property name="IspChipErase_eraseDelay" value="10"/>
+ <property name="IspChipErase_pollMethod" value="0"/>
+ <property name="IspProgramFlash_mode" value="0x41"/>
+ <property name="IspProgramFlash_blockSize" value="64"/>
+ <property name="IspProgramFlash_delay" value="10"/>
+ <property name="IspProgramFlash_cmd1" value="0x40"/>
+ <property name="IspProgramFlash_cmd2" value="0x4C"/>
+ <property name="IspProgramFlash_cmd3" value="0x00"/>
+ <property name="IspProgramFlash_pollVal1" value="0x00"/>
+ <property name="IspProgramFlash_pollVal2" value="0x00"/>
+ <property name="IspProgramEeprom_mode" value="0x41"/>
+ <property name="IspProgramEeprom_blockSize" value="4"/>
+ <property name="IspProgramEeprom_delay" value="10"/>
+ <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+ <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+ <property name="IspProgramEeprom_cmd3" value="0x00"/>
+ <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+ <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+ <property name="IspReadFlash_blockSize" value="256"/>
+ <property name="IspReadEeprom_blockSize" value="256"/>
+ <property name="IspReadFuse_pollIndex" value="4"/>
+ <property name="IspReadLock_pollIndex" value="4"/>
+ <property name="IspReadSign_pollIndex" value="4"/>
+ <property name="IspReadOsccal_pollIndex" value="4"/>
+ </property-group>
+ <property-group name="PP_INTERFACE">
+ <property name="PpControlStack" value="0xC4 0xE4 0xC4 0xE4 0xCC 0xEC 0xCC 0xEC 0xD4 0xF4 0xD4 0xF4 0xDC 0xFC 0xDC 0xFC 0xC8 0xE8 0xD8 0xF8 0x4C 0x6C 0x5C 0x7C 0xEC 0xBC 0x00 0x06 0x00 0x00 0x00 0x00"/>
+ <property name="PpEnterProgMode_stabDelay" value="100"/>
+ <property name="PpEnterProgMode_progModeDelay" value="0"/>
+ <property name="PpEnterProgMode_latchCycles" value="5"/>
+ <property name="PpEnterProgMode_toggleVtg" value="1"/>
+ <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+ <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+ <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+ <property name="PpLeaveProgMode_stabDelay" value="15"/>
+ <property name="PpLeaveProgMode_resetDelay" value="15"/>
+ <property name="PpChipErase_pulseWidth" value="0"/>
+ <property name="PpChipErase_pollTimeout" value="10"/>
+ <property name="PpProgramFlash_pollTimeout" value="5"/>
+ <property name="PpProgramFlash_mode" value="0x0D"/>
+ <property name="PpProgramFlash_blockSize" value="256"/>
+ <property name="PpReadFlash_blockSize" value="256"/>
+ <property name="PpProgramEeprom_pollTimeout" value="5"/>
+ <property name="PpProgramEeprom_mode" value="0x05"/>
+ <property name="PpProgramEeprom_blockSize" value="256"/>
+ <property name="PpReadEeprom_blockSize" value="256"/>
+ <property name="PpProgramFuse_pulseWidth" value="0"/>
+ <property name="PpProgramFuse_pollTimeout" value="5"/>
+ <property name="PpProgramLock_pulseWidth" value="0"/>
+ <property name="PpProgramLock_pollTimeout" value="5"/>
+ </property-group>
+ <property-group name="ISP_INTERFACE_STK600">
+ <property name="IspEnterProgMode_timeout" value="200"/>
+ <property name="IspEnterProgMode_stabDelay" value="100"/>
+ <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+ <property name="IspEnterProgMode_synchLoops" value="32"/>
+ <property name="IspEnterProgMode_byteDelay" value="0"/>
+ <property name="IspEnterProgMode_pollIndex" value="3"/>
+ <property name="IspEnterProgMode_pollValue" value="0x53"/>
+ <property name="IspLeaveProgMode_preDelay" value="1"/>
+ <property name="IspLeaveProgMode_postDelay" value="1"/>
+ <property name="IspChipErase_eraseDelay" value="10"/>
+ <property name="IspChipErase_pollMethod" value="0"/>
+ <property name="IspProgramFlash_mode" value="0x41"/>
+ <property name="IspProgramFlash_blockSize" value="64"/>
+ <property name="IspProgramFlash_delay" value="10"/>
+ <property name="IspProgramFlash_cmd1" value="0x40"/>
+ <property name="IspProgramFlash_cmd2" value="0x4C"/>
+ <property name="IspProgramFlash_cmd3" value="0x00"/>
+ <property name="IspProgramFlash_pollVal1" value="0x00"/>
+ <property name="IspProgramFlash_pollVal2" value="0x00"/>
+ <property name="IspProgramEeprom_mode" value="0x41"/>
+ <property name="IspProgramEeprom_blockSize" value="4"/>
+ <property name="IspProgramEeprom_delay" value="10"/>
+ <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+ <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+ <property name="IspProgramEeprom_cmd3" value="0x00"/>
+ <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+ <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+ <property name="IspReadFlash_blockSize" value="256"/>
+ <property name="IspReadEeprom_blockSize" value="256"/>
+ <property name="IspReadFuse_pollIndex" value="4"/>
+ <property name="IspReadLock_pollIndex" value="4"/>
+ <property name="IspReadSign_pollIndex" value="4"/>
+ <property name="IspReadOsccal_pollIndex" value="4"/>
+ </property-group>
+ <property-group name="PP_INTERFACE_STK600">
+ <property name="PpControlStack" value="0x0E 0x1E 0x0E 0x1E 0x2E 0x3E 0x2E 0x3E 0x4E 0x5E 0x4E 0x5E 0x6E 0x7E 0x6E 0x7E 0x06 0x16 0x46 0x56 0x0A 0x1A 0x4A 0x5A 0x1E 0x7C 0x00 0x01 0x00 0x00 0x00 0x00"/>
+ <property name="PpEnterProgMode_stabDelay" value="100"/>
+ <property name="PpEnterProgMode_progModeDelay" value="0"/>
+ <property name="PpEnterProgMode_latchCycles" value="5"/>
+ <property name="PpEnterProgMode_toggleVtg" value="1"/>
+ <property name="PpEnterProgMode_powerOffDelay" value="20"/>
+ <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+ <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+ <property name="PpLeaveProgMode_stabDelay" value="15"/>
+ <property name="PpLeaveProgMode_resetDelay" value="15"/>
+ <property name="PpChipErase_pulseWidth" value="0"/>
+ <property name="PpChipErase_pollTimeout" value="10"/>
+ <property name="PpProgramFlash_pollTimeout" value="5"/>
+ <property name="PpProgramFlash_mode" value="0x0B"/>
+ <property name="PpProgramFlash_blockSize" value="256"/>
+ <property name="PpReadFlash_blockSize" value="256"/>
+ <property name="PpProgramEeprom_pollTimeout" value="5"/>
+ <property name="PpProgramEeprom_mode" value="0x05"/>
+ <property name="PpProgramEeprom_blockSize" value="256"/>
+ <property name="PpReadEeprom_blockSize" value="256"/>
+ <property name="PpProgramFuse_pulseWidth" value="0"/>
+ <property name="PpProgramFuse_pollTimeout" value="5"/>
+ <property name="PpProgramLock_pulseWidth" value="0"/>
+ <property name="PpProgramLock_pollTimeout" value="5"/>
+ </property-group>
+ <property-group name="PP_INTERFACE_AVRDRAGON">
+ <property name="PpControlStack" value="0xC4 0xE4 0xC4 0xE4 0xCC 0xEC 0xCC 0xEC 0xD4 0xF4 0xD4 0xF4 0xDC 0xFC 0xDC 0xFC 0xC8 0xE8 0xD8 0xF8 0x4C 0x6C 0x5C 0x7C 0xEC 0xBC 0x80 0x06 0x00 0x00 0x00 0x00"/>
+ <property name="PpEnterProgMode_stabDelay" value="100"/>
+ <property name="PpEnterProgMode_progModeDelay" value="0"/>
+ <property name="PpEnterProgMode_latchCycles" value="5"/>
+ <property name="PpEnterProgMode_toggleVtg" value="1"/>
+ <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+ <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+ <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+ <property name="PpLeaveProgMode_stabDelay" value="15"/>
+ <property name="PpLeaveProgMode_resetDelay" value="15"/>
+ <property name="PpChipErase_pulseWidth" value="0"/>
+ <property name="PpChipErase_pollTimeout" value="10"/>
+ <property name="PpProgramFlash_pollTimeout" value="5"/>
+ <property name="PpProgramFlash_mode" value="0x0D"/>
+ <property name="PpProgramFlash_blockSize" value="256"/>
+ <property name="PpReadFlash_blockSize" value="256"/>
+ <property name="PpProgramEeprom_pollTimeout" value="5"/>
+ <property name="PpProgramEeprom_mode" value="0x05"/>
+ <property name="PpProgramEeprom_blockSize" value="256"/>
+ <property name="PpReadEeprom_blockSize" value="256"/>
+ <property name="PpProgramFuse_pulseWidth" value="0"/>
+ <property name="PpProgramFuse_pollTimeout" value="5"/>
+ <property name="PpProgramLock_pulseWidth" value="0"/>
+ <property name="PpProgramLock_pollTimeout" value="5"/>
+ </property-group>
+ </property-groups>
+ </device>
+ </devices>
+ <modules>
+ <module caption="Fuses" name="FUSE">
+ <register-group caption="Fuses" name="FUSE">
+ <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
+ <bitfield caption="Self Programming enable" mask="0x01" name="SELFPRGEN"/>
+ </register>
+ <register caption="" name="HIGH" offset="0x01" size="1" initval="0xDF">
+ <bitfield caption="Reset Disabled (Enable PB7 as i/o pin)" mask="0x80" name="RSTDISBL"/>
+ <bitfield caption="Debug Wire enable" mask="0x40" name="DWEN"/>
+ <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+ <bitfield caption="Watch-dog Timer always on" mask="0x10" name="WDTON"/>
+ <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+ <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
+ </register>
+ <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+ <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+ <bitfield caption="Clock output on PORTB5" mask="0x40" name="CKOUT"/>
+ <bitfield caption="Select Clock source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+ </register>
+ </register-group>
+ <value-group caption="" name="ENUM_SUT_CKSEL">
+ <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS" value="0x00"/>
+ <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="EXTCLK_6CK_14CK_4MS" value="0x10"/>
+ <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms" name="EXTCLK_6CK_14CK_64MS" value="0x20"/>
+ <value caption="PLL Clock; Start-up time PWRDWN/RESET: 1K CK/14 CK + 8 ms" name="PLLCLK_1KCK_14CK_8MS" value="0x01"/>
+ <value caption="PLL Clock; Start-up time PWRDWN/RESET: 16K CK/14 CK + 8 ms" name="PLLCLK_16KCK_14CK_8MS" value="0x11"/>
+ <value caption="PLL Clock; Start-up time PWRDWN/RESET: 1K CK/14 CK + 68 ms" name="PLLCLK_1KCK_14CK_68MS" value="0x21"/>
+ <value caption="PLL Clock; Start-up time PWRDWN/RESET: 16K CK/14 CK + 68 ms" name="PLLCLK_16KCK_14CK_68MS" value="0x31"/>
+ <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
+ <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="INTRCOSC_8MHZ_6CK_14CK_4MS" value="0x12"/>
+ <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms" name="INTRCOSC_8MHZ_6CK_14CK_64MS" value="0x22"/>
+ <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="WDOSC_128KHZ_6CK_14CK_0MS" value="0x03"/>
+ <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="WDOSC_128KHZ_6CK_14CK_4MS" value="0x13"/>
+ <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms" name="WDOSC_128KHZ_6CK_14CK_64MS" value="0x23"/>
+ <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1 CK 4 ms" name="EXTLOFXTAL_1CK_4MS" value="0x04"/>
+ <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1 CK + 64 ms" name="EXTLOFXTAL_1CK_64MS" value="0x14"/>
+ <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32 CK + 64 ms" name="EXTLOFXTAL_32CK_64MS" value="0x24"/>
+ <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTCRES_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
+ <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTCRES_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
+ <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTCRES_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
+ <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTCRES_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
+ <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTCRES_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
+ <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
+ <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
+ <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
+ <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTCRES_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
+ <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTCRES_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
+ <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTCRES_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
+ <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTCRES_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
+ <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTCRES_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
+ <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
+ <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
+ <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
+ <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTCRES_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
+ <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTCRES_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
+ <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTCRES_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
+ <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTCRES_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
+ <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTCRES_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
+ <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
+ <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
+ <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
+ <value caption="Ext. Ceramic Res. 8.0- MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTCRES_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
+ <value caption="Ext. Ceramic Res. 8.0- MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTCRES_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
+ <value caption="Ext. Ceramic Res. 8.0- MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTCRES_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
+ <value caption="Ext. Ceramic Res. 8.0- MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTCRES_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
+ <value caption="Ext. Ceramic Res. 8.0- MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTCRES_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
+ <value caption="Ext. Crystal Osc. 8.0- MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
+ <value caption="Ext. Crystal Osc. 8.0- MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
+ <value caption="Ext. Crystal Osc. 8.0- MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
+ </value-group>
+ <value-group caption="" name="ENUM_BODLEVEL">
+ <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
+ <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x05"/>
+ <value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x06"/>
+ <value caption="Brown-out detection at VCC=2.3 V" name="2V3" value="0x03"/>
+ <value caption="Brown-out detection at VCC=2.2 V" name="2V2" value="0x02"/>
+ <value caption="Brown-out detection at VCC=1.9 V" name="1V9" value="0x01"/>
+ <value caption="Brown-out detection at VCC=2.0 V" name="2V0" value="0x00"/>
+ <value caption="Brown-out detection disabled" name="DISABLED" value="0x07"/>
+ </value-group>
+ </module>
+ <module caption="Lockbits" name="LOCKBIT">
+ <register-group caption="Lockbits" name="LOCKBIT">
+ <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+ <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+ </register>
+ </register-group>
+ <value-group caption="" name="ENUM_LB">
+ <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+ <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+ <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+ </value-group>
+ </module>
+ <module caption="I/O Port" name="PORT">
+ <register-group caption="I/O Port" name="PORTA">
+ <register caption="Port A Data Register" name="PORTA" offset="0x3B" size="1" mask="0xFF"/>
+ <register caption="Port A Data Direction Register" name="DDRA" offset="0x3A" size="1" mask="0xFF"/>
+ <register caption="Port A Input Pins" name="PINA" offset="0x39" size="1" mask="0xFF" ocd-rw="R"/>
+ </register-group>
+ <register-group caption="I/O Port" name="PORTB">
+ <register caption="Port B Data Register" name="PORTB" offset="0x38" size="1" mask="0xFF"/>
+ <register caption="Port B Data Direction Register" name="DDRB" offset="0x37" size="1" mask="0xFF"/>
+ <register caption="Port B Input Pins" name="PINB" offset="0x36" size="1" mask="0xFF" ocd-rw="R"/>
+ </register-group>
+ </module>
+ <module caption="Analog-to-Digital Converter" name="ADC">
+ <register-group caption="Analog-to-Digital Converter" name="ADC">
+ <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x27" size="1">
+ <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS"/>
+ <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+ <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"/>
+ </register>
+ <register caption="The ADC Control and Status register" name="ADCSRA" offset="0x26" size="1" ocd-rw="R">
+ <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+ <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+ <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
+ <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+ <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+ <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
+ </register>
+ <register caption="ADC Data Register Bytes" name="ADC" offset="0x24" size="2" mask="0xFFFF"/>
+ <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x23" size="1">
+ <bitfield caption="Bipolar Input Mode" mask="0x80" name="BIN"/>
+ <bitfield caption="Gain Select" mask="0x40" name="GSEL"/>
+ <bitfield caption="Input Polarity Mode" mask="0x20" name="IPR"/>
+ <bitfield caption="Reference Selection Bit" mask="0x10" name="REFS2"/>
+ <bitfield caption="Analog Channel and Gain Selection Bit 5" mask="0x08" name="MUX5"/>
+ <bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER3"/>
+ </register>
+ <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x22" size="1">
+ <bitfield caption="ADC10 Digital input Disable" mask="0x80" name="ADC10D"/>
+ <bitfield caption="ADC9 Digital input Disable" mask="0x40" name="ADC9D"/>
+ <bitfield caption="ADC8 Digital input Disable" mask="0x20" name="ADC8D"/>
+ <bitfield caption="ADC7 Digital input Disable" mask="0x10" name="ADC7D"/>
+ </register>
+ <register caption="Digital Input Disable Register 0" name="DIDR0" offset="0x21" size="1">
+ <bitfield caption="ADC6 Digital input Disable" mask="0x80" name="ADC6D"/>
+ <bitfield caption="ADC5 Digital input Disable" mask="0x40" name="ADC5D"/>
+ <bitfield caption="ADC4 Digital input Disable" mask="0x20" name="ADC4D"/>
+ <bitfield caption="ADC3 Digital input Disable" mask="0x10" name="ADC3D"/>
+ <bitfield caption="AREF Digital Input Disable" mask="0x08" name="AREFD"/>
+ <bitfield caption="ADC2 Digital input Disable" mask="0x04" name="ADC2D"/>
+ <bitfield caption="ADC1 Digital input Disable" mask="0x02" name="ADC1D"/>
+ <bitfield caption="ADC0 Digital input Disable" mask="0x01" name="ADC0D"/>
+ </register>
+ </register-group>
+ <value-group caption="" name="ANALOG_ADC_PRESCALER">
+ <value caption="2" name="VAL_0x00" value="0x00"/>
+ <value caption="2" name="VAL_0x01" value="0x01"/>
+ <value caption="4" name="VAL_0x02" value="0x02"/>
+ <value caption="8" name="VAL_0x03" value="0x03"/>
+ <value caption="16" name="VAL_0x04" value="0x04"/>
+ <value caption="32" name="VAL_0x05" value="0x05"/>
+ <value caption="64" name="VAL_0x06" value="0x06"/>
+ <value caption="128" name="VAL_0x07" value="0x07"/>
+ </value-group>
+ <value-group caption="" name="ANALOG_ADC_AUTO_TRIGGER3">
+ <value caption="Free Running mode" name="VAL_0x00" value="0x00"/>
+ <value caption="Analog Comparator" name="VAL_0x01" value="0x01"/>
+ <value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
+ <value caption="Timer/Counter0 Compare Match A" name="VAL_0x03" value="0x03"/>
+ <value caption="Timer/Counter0 Overflow" name="VAL_0x04" value="0x04"/>
+ <value caption="Timer/Counter1 Compare Match B" name="VAL_0x05" value="0x05"/>
+ <value caption="Timer/Counter1 Overflow" name="VAL_0x06" value="0x06"/>
+ <value caption="Watchdog Interrupt Request" name="VAL_0x07" value="0x07"/>
+ </value-group>
+ </module>
+ <module caption="Analog Comparator" name="AC">
+ <register-group caption="Analog Comparator" name="AC">
+ <register caption="Analog Comparator Control And Status Register B" name="ACSRB" offset="0x29" size="1">
+ <bitfield caption="Hysteresis Select" mask="0x80" name="HSEL"/>
+ <bitfield caption="Hysteresis Level" mask="0x40" name="HLEV"/>
+ <bitfield caption="Analog Comparator Multiplexer" mask="0x07" name="ACM"/>
+ </register>
+ <register caption="Analog Comparator Control And Status Register A" name="ACSRA" offset="0x28" size="1">
+ <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+ <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+ <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+ <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+ <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+ <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x04" name="ACME"/>
+ <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
+ </register>
+ </register-group>
+ <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+ <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+ <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+ <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+ <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+ </value-group>
+ </module>
+ <module caption="Universal Serial Interface" name="USI">
+ <register-group caption="Universal Serial Interface" name="USI">
+ <register caption="USI Pin Position" name="USIPP" offset="0x31" size="1" mask="0x01"/>
+ <register caption="USI Buffer Register" name="USIBR" offset="0x30" size="1" mask="0xFF" ocd-rw="R"/>
+ <register caption="USI Data Register" name="USIDR" offset="0x2F" size="1" mask="0xFF"/>
+ <register caption="USI Status Register" name="USISR" offset="0x2E" size="1" ocd-rw="R">
+ <bitfield caption="Start Condition Interrupt Flag" mask="0x80" name="USISIF"/>
+ <bitfield caption="Counter Overflow Interrupt Flag" mask="0x40" name="USIOIF"/>
+ <bitfield caption="Stop Condition Flag" mask="0x20" name="USIPF"/>
+ <bitfield caption="Data Output Collision" mask="0x10" name="USIDC"/>
+ <bitfield caption="USI Counter Value Bits" mask="0x0F" name="USICNT"/>
+ </register>
+ <register caption="USI Control Register" name="USICR" offset="0x2D" size="1">
+ <bitfield caption="Start Condition Interrupt Enable" mask="0x80" name="USISIE"/>
+ <bitfield caption="Counter Overflow Interrupt Enable" mask="0x40" name="USIOIE"/>
+ <bitfield caption="USI Wire Mode Bits" mask="0x30" name="USIWM" values="COMM_USI_OP"/>
+ <bitfield caption="USI Clock Source Select Bits" mask="0x0C" name="USICS"/>
+ <bitfield caption="Clock Strobe" mask="0x02" name="USICLK"/>
+ <bitfield caption="Toggle Clock Port Pin" mask="0x01" name="USITC"/>
+ </register>
+ </register-group>
+ <value-group caption="" name="COMM_USI_OP">
+ <value caption="Normal Operation" name="VAL_0x00" value="0x00"/>
+ <value caption="Three-Wire Mode" name="VAL_0x01" value="0x01"/>
+ <value caption="Two-Wire Mode" name="VAL_0x02" value="0x02"/>
+ <value caption="Two-Wire Mode Held Low" name="VAL_0x03" value="0x03"/>
+ </value-group>
+ </module>
+ <module caption="EEPROM" name="EEPROM">
+ <register-group caption="EEPROM" name="EEPROM">
+ <register caption="EEPROM Address Register Bytes" name="EEAR" offset="0x3E" size="2" mask="0x01FF"/>
+ <register caption="EEPROM Data Register" name="EEDR" offset="0x3D" size="1" mask="0xFF"/>
+ <register caption="EEPROM Control Register" name="EECR" offset="0x3C" size="1">
+ <bitfield caption="EEPROM Programming Mode Bits" mask="0x30" name="EEPM" values="EEP_MODE"/>
+ <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+ <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMPE"/>
+ <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEPE"/>
+ <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+ </register>
+ </register-group>
+ <value-group caption="" name="EEP_MODE">
+ <value caption="Erase and Write in one operation" name="VAL_0x00" value="0x00"/>
+ <value caption="Erase Only" name="VAL_0x01" value="0x01"/>
+ <value caption="Write Only" name="VAL_0x02" value="0x02"/>
+ </value-group>
+ </module>
+ <module caption="Watchdog Timer" name="WDT">
+ <register-group caption="Watchdog Timer" name="WDT">
+ <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x41" size="1" ocd-rw="R">
+ <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
+ <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
+ <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
+ <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+ <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+ </register>
+ </register-group>
+ <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
+ <value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
+ <value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
+ <value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
+ <value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
+ <value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
+ <value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
+ <value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
+ <value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
+ <value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
+ <value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
+ </value-group>
+ </module>
+ <module caption="Timer/Counter, 8-bit" name="TC8">
+ <register-group caption="Timer/Counter, 8-bit" name="TC0">
+ <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK" offset="0x59" size="1">
+ <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x10" name="OCIE0A"/>
+ <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x08" name="OCIE0B"/>
+ <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x02" name="TOIE0"/>
+ <bitfield caption="Timer/Counter0 Input Capture Interrupt Enable" mask="0x01" name="TICIE0"/>
+ </register>
+ <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR" offset="0x58" size="1" ocd-rw="R">
+ <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x10" name="OCF0A"/>
+ <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x08" name="OCF0B"/>
+ <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x02" name="TOV0"/>
+ <bitfield caption="Timer/Counter0 Input Capture Flag" mask="0x01" name="ICF0"/>
+ </register>
+ <register caption="Timer/Counter Control Register A" name="TCCR0A" offset="0x35" size="1">
+ <bitfield caption="Timer/Counter 0 Width" mask="0x80" name="TCW0"/>
+ <bitfield caption="Input Capture Mode Enable" mask="0x40" name="ICEN0"/>
+ <bitfield caption="Input Capture Noice Canceler" mask="0x20" name="ICNC0"/>
+ <bitfield caption="Input Capture Edge Select" mask="0x10" name="ICES0"/>
+ <bitfield caption="Analog Comparator Input Capture Enable" mask="0x08" name="ACIC0"/>
+ <bitfield caption="Waveform Generation Mode" mask="0x01" name="WGM00"/>
+ </register>
+ <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x53" size="1">
+ <bitfield caption="Timer/Counter Synchronization Mode" mask="0x10" name="TSM"/>
+ <bitfield caption="Timer/Counter 0 Prescaler Reset" mask="0x08" name="PSR0"/>
+ <bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+ </register>
+ <register caption="Timer/Counter0 High" name="TCNT0H" offset="0x34" size="1" mask="0xFF"/>
+ <register caption="Timer/Counter0 Low" name="TCNT0L" offset="0x52" size="1" mask="0xFF"/>
+ <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x33" size="1" mask="0xFF"/>
+ <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x32" size="1" mask="0xFF"/>
+ </register-group>
+ <value-group caption="" name="CLK_SEL_3BIT_EXT">
+ <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+ <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+ <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+ <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+ <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+ <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+ <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+ <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+ </value-group>
+ </module>
+ <module caption="Timer/Counter, 16-bit" name="TC16">
+ <register-group caption="Timer/Counter, 16-bit" name="TC1">
+ <register caption="Timer/Counter Control Register A" name="TCCR1A" offset="0x50" size="1">
+ <bitfield caption="Compare Output Mode, Bits" mask="0xC0" name="COM1A"/>
+ <bitfield caption="Compare Output Mode, Bits" mask="0x30" name="COM1B"/>
+ <bitfield caption="Force Output Compare Match 1A" mask="0x08" name="FOC1A"/>
+ <bitfield caption="Force Output Compare Match 1B" mask="0x04" name="FOC1B"/>
+ <bitfield caption="Pulse Width Modulator Enable" mask="0x02" name="PWM1A"/>
+ <bitfield caption="Pulse Width Modulator Enable" mask="0x01" name="PWM1B"/>
+ </register>
+ <register caption="Timer/Counter Control Register B" name="TCCR1B" offset="0x4F" size="1">
+ <bitfield caption="PWM Inversion Mode" mask="0x80" name="PWM1X"/>
+ <bitfield caption="Timer/Counter 1 Prescaler reset" mask="0x40" name="PSR1"/>
+ <bitfield caption="Dead Time Prescaler" mask="0x30" name="DTPS1" values="MISC_2BIT_SCALE"/>
+ <bitfield caption="Clock Select Bits" mask="0x0F" name="CS1" values="CLK_SEL_4BIT"/>
+ </register>
+ <register caption="Timer/Counter Control Register C" name="TCCR1C" offset="0x47" size="1">
+ <bitfield caption="COM1A1 Shadow Bit" mask="0x80" name="COM1A1S"/>
+ <bitfield caption="COM1A0 Shadow Bit" mask="0x40" name="COM1A0S"/>
+ <bitfield caption="COM1B1 Shadow Bit" mask="0x20" name="COM1B1S"/>
+ <bitfield caption="COM1B0 Shadow Bit" mask="0x10" name="COM1B0S"/>
+ <bitfield caption="Comparator D output mode" mask="0x0C" name="COM1D"/>
+ <bitfield caption="Force Output Compare Match 1D" mask="0x02" name="FOC1D"/>
+ <bitfield caption="Pulse Width Modulator D Enable" mask="0x01" name="PWM1D"/>
+ </register>
+ <register caption="Timer/Counter Control Register D" name="TCCR1D" offset="0x46" size="1">
+ <bitfield caption="Fault Protection Interrupt Enable" mask="0x80" name="FPIE1"/>
+ <bitfield caption="Fault Protection Mode Enable" mask="0x40" name="FPEN1"/>
+ <bitfield caption="Fault Protection Noise Canceler" mask="0x20" name="FPNC1"/>
+ <bitfield caption="Fault Protection Edge Select" mask="0x10" name="FPES1"/>
+ <bitfield caption="Fault Protection Analog Comparator Enable" mask="0x08" name="FPAC1"/>
+ <bitfield caption="Fault Protection Interrupt Flag" mask="0x04" name="FPF1"/>
+ <bitfield caption="Waveform Generation Mode Bit" mask="0x03" name="WGM1" values="PULSE_WIDTH_MODU2"/>
+ </register>
+ <register caption="Timer/Counter1 Control Register E" name="TCCR1E" offset="0x20" size="1">
+ <bitfield caption="Ouput Compare Override Enable Bits" mask="0x3F" name="OC1OE"/>
+ </register>
+ <register caption="Timer/Counter Register" name="TCNT1" offset="0x4E" size="1" mask="0xFF" ocd-rw="R"/>
+ <register caption="Timer/Counter 1 Register High" name="TC1H" offset="0x45" size="1" mask="0x03"/>
+ <register caption="Output Compare Register" name="OCR1A" offset="0x4D" size="1" mask="0xFF"/>
+ <register caption="Output Compare Register" name="OCR1B" offset="0x4C" size="1" mask="0xFF"/>
+ <register caption="Output compare register" name="OCR1C" offset="0x4B" size="1" mask="0xFF"/>
+ <register caption="Output compare register" name="OCR1D" offset="0x4A" size="1" mask="0xFF" ocd-rw="R"/>
+ <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK" offset="0x59" size="1">
+ <bitfield caption="OCIE1D: Timer/Counter1 Output Compare Interrupt Enable" mask="0x80" name="OCIE1D"/>
+ <bitfield caption="OCIE1A: Timer/Counter1 Output Compare Interrupt Enable" mask="0x40" name="OCIE1A"/>
+ <bitfield caption="OCIE1A: Timer/Counter1 Output Compare B Interrupt Enable" mask="0x20" name="OCIE1B"/>
+ <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x04" name="TOIE1"/>
+ </register>
+ <register caption="Timer/Counter Interrupt Flag Register" name="TIFR" offset="0x58" size="1" ocd-rw="R">
+ <bitfield caption="Timer/Counter1 Output Compare Flag 1D" mask="0x80" name="OCF1D"/>
+ <bitfield caption="Timer/Counter1 Output Compare Flag 1A" mask="0x40" name="OCF1A"/>
+ <bitfield caption="Timer/Counter1 Output Compare Flag 1B" mask="0x20" name="OCF1B"/>
+ <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x04" name="TOV1"/>
+ </register>
+ <register caption="Timer/Counter 1 Dead Time Value" name="DT1" offset="0x44" size="1">
+ <bitfield caption="" mask="0xF0" name="DT1H"/>
+ <bitfield caption="" mask="0x0F" name="DT1L"/>
+ </register>
+ </register-group>
+ <value-group caption="" name="MISC_2BIT_SCALE">
+ <value caption="1x" name="VAL_0x00" value="0x00"/>
+ <value caption="2x" name="VAL_0x01" value="0x01"/>
+ <value caption="4x" name="VAL_0x02" value="0x02"/>
+ <value caption="8x" name="VAL_0x03" value="0x03"/>
+ </value-group>
+ <value-group caption="" name="CLK_SEL_4BIT">
+ <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+ <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+ <value caption="Running, CLK/2" name="VAL_0x02" value="0x02"/>
+ <value caption="Running, CLK/4" name="VAL_0x03" value="0x03"/>
+ <value caption="Running, CLK/8" name="VAL_0x04" value="0x04"/>
+ <value caption="Running, CLK/16" name="VAL_0x05" value="0x05"/>
+ <value caption="Running, CLK/32" name="VAL_0x06" value="0x06"/>
+ <value caption="Running, CLK/64" name="VAL_0x07" value="0x07"/>
+ <value caption="Running, CLK/128" name="VAL_0x08" value="0x08"/>
+ <value caption="Running, CLK/256" name="VAL_0x09" value="0x09"/>
+ <value caption="Running, CLK/512" name="VAL_0x0A" value="0x0A"/>
+ <value caption="Running, CLK/1024" name="VAL_0x0B" value="0x0B"/>
+ <value caption="Running, CLK/2048" name="VAL_0x0C" value="0x0C"/>
+ <value caption="Running, CLK/4096" name="VAL_0x0D" value="0x0D"/>
+ <value caption="Running, CLK/8192" name="VAL_0x0E" value="0x0E"/>
+ <value caption="Running, CLK/16384" name="VAL_0x0F" value="0x0F"/>
+ </value-group>
+ <value-group caption="" name="PULSE_WIDTH_MODU2">
+ <value caption="Fast PWM (NB! PWMx must be set!)" name="VAL_0x00" value="0x00"/>
+ <value caption="Phase and Frequency Correct PWM" name="VAL_0x01" value="0x01"/>
+ <value caption="PWM6/Single-slope" name="VAL_0x02" value="0x02"/>
+ <value caption="PWM6/Dual-slope" name="VAL_0x03" value="0x03"/>
+ </value-group>
+ </module>
+ <module caption="Bootloader" name="BOOT_LOAD">
+ <register-group caption="Bootloader" name="BOOT_LOAD">
+ <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1" ocd-rw="R">
+ <bitfield caption="Clear temporary page buffer" mask="0x10" name="CTPB"/>
+ <bitfield caption="Read fuse and lock bits" mask="0x08" name="RFLB"/>
+ <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+ <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+ <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+ </register>
+ </register-group>
+ </module>
+ <module caption="External Interrupts" name="EXINT">
+ <register-group caption="External Interrupts" name="EXINT">
+ <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+ <bitfield caption="Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
+ <bitfield caption="Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00" values="INTERRUPT_SENSE_CONTROL"/>
+ </register>
+ <register caption="General Interrupt Mask Register" name="GIMSK" offset="0x5B" size="1">
+ <bitfield caption="External Interrupt Request 1 Enable" mask="0xC0" name="INT"/>
+ <bitfield caption="Pin Change Interrupt Enables" mask="0x30" name="PCIE"/>
+ </register>
+ <register caption="General Interrupt Flag register" name="GIFR" offset="0x5A" size="1" ocd-rw="R">
+ <bitfield caption="External Interrupt Flags" mask="0xC0" name="INTF"/>
+ <bitfield caption="Pin Change Interrupt Flag" mask="0x20" name="PCIF"/>
+ </register>
+ <register caption="Pin Change Enable Mask 1" name="PCMSK1" offset="0x42" size="1" mask="0xFF"/>
+ <register caption="Pin Change Enable Mask 0" name="PCMSK0" offset="0x43" size="1" mask="0xFF"/>
+ </register-group>
+ <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+ <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+ <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+ <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+ <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+ </value-group>
+ </module>
+ <module caption="CPU Registers" name="CPU">
+ <register-group caption="CPU Registers" name="CPU">
+ <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+ <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+ <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+ <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+ <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+ <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+ <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+ <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+ <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+ </register>
+ <register caption="Power Reduction Register" name="PRR" offset="0x56" size="1">
+ <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
+ <bitfield caption="Power Reduction Timer/Counter0" mask="0x04" name="PRTIM0"/>
+ <bitfield caption="Power Reduction USI" mask="0x02" name="PRUSI"/>
+ <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+ </register>
+ <register caption="Stack Pointer Bytes" name="SP" offset="0x5D" size="2" mask="0x03FF"/>
+ <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+ <bitfield caption="Pull-up Disable" mask="0x40" name="PUD"/>
+ <bitfield caption="Sleep Enable" mask="0x20" name="SE"/>
+ <bitfield caption="Sleep Mode Select Bits" mask="0x18" name="SM" values="CPU_SLEEP_MODE"/>
+ <bitfield caption="Interrupt Sense Control 0 bits" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL2"/>
+ </register>
+ <register caption="MCU Status register" name="MCUSR" offset="0x54" size="1">
+ <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+ <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+ <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+ <bitfield caption="Power-On Reset Flag" mask="0x01" name="PORF"/>
+ </register>
+ <register caption="Oscillator Calibration Register" name="OSCCAL" offset="0x51" size="1" mask="0xFF" ocd-rw="R">
+ <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+ </register>
+ <register caption="Clock Prescale Register" name="CLKPR" offset="0x48" size="1" ocd-rw="R">
+ <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
+ <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+ </register>
+ <register caption="PLL Control and status register" name="PLLCSR" offset="0x49" size="1">
+ <bitfield caption="Low speed mode" mask="0x80" name="LSM"/>
+ <bitfield caption="PCK Enable" mask="0x04" name="PCKE"/>
+ <bitfield caption="PLL Enable" mask="0x02" name="PLLE"/>
+ <bitfield caption="PLL Lock detector" mask="0x01" name="PLOCK"/>
+ </register>
+ <register caption="debugWire data register" name="DWDR" offset="0x40" size="1" mask="0xFF" ocd-rw=""/>
+ <register caption="General Purpose IO register 2" name="GPIOR2" offset="0x2C" size="1" mask="0xFF"/>
+ <register caption="General Purpose register 1" name="GPIOR1" offset="0x2B" size="1" mask="0xFF"/>
+ <register caption="General purpose register 0" name="GPIOR0" offset="0x2A" size="1" mask="0xFF"/>
+ </register-group>
+ <value-group caption="" name="CPU_SLEEP_MODE">
+ <value caption="Idle" name="IDLE" value="0x00"/>
+ <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+ <value caption="Power Down" name="PDOWN" value="0x02"/>
+ <value caption="Standby" name="STDBY" value="0x03"/>
+ </value-group>
+ <value-group caption="" name="INTERRUPT_SENSE_CONTROL2">
+ <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+ <value caption="Any Logical Change in INTX" name="VAL_0x01" value="0x01"/>
+ <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+ <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+ </value-group>
+ <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+ <value caption="1" name="VAL_0x00" value="0x00"/>
+ <value caption="2" name="VAL_0x01" value="0x01"/>
+ <value caption="4" name="VAL_0x02" value="0x02"/>
+ <value caption="8" name="VAL_0x03" value="0x03"/>
+ <value caption="16" name="VAL_0x04" value="0x04"/>
+ <value caption="32" name="VAL_0x05" value="0x05"/>
+ <value caption="64" name="VAL_0x06" value="0x06"/>
+ <value caption="128" name="VAL_0x07" value="0x07"/>
+ <value caption="256" name="VAL_0x08" value="0x08"/>
+ </value-group>
+ <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+ <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+ </value-group>
+
+ </module>
+ </modules>
+ <pinouts>
+ <pinout name="SOIC_20">
+ <pin pad="PB0" position="1"/>
+ <pin pad="PB1" position="2"/>
+ <pin pad="PB2" position="3"/>
+ <pin pad="PB3" position="4"/>
+ <pin pad="VCC" position="5"/>
+ <pin pad="GND" position="6"/>
+ <pin pad="PB4" position="7"/>
+ <pin pad="PB5" position="8"/>
+ <pin pad="PB6" position="9"/>
+ <pin pad="PB7" position="10"/>
+ <pin pad="PA7" position="11"/>
+ <pin pad="PA6" position="12"/>
+ <pin pad="PA5" position="13"/>
+ <pin pad="PA4" position="14"/>
+ <pin pad="AVCC" position="15"/>
+ <pin pad="AGND" position="16"/>
+ <pin pad="PA3" position="17"/>
+ <pin pad="PA2" position="18"/>
+ <pin pad="PA1" position="19"/>
+ <pin pad="PA0" position="20"/>
+ </pinout>
+ <pinout name="QFN_32">
+ <pin pad="PB3" position="2"/>
+ <pin pad="VCC" position="4"/>
+ <pin pad="GND" position="5"/>
+ <pin pad="PB4" position="7"/>
+ <pin pad="PB5" position="8"/>
+ <pin pad="PB6" position="10"/>
+ <pin pad="PB7" position="11"/>
+ <pin pad="PA7" position="13"/>
+ <pin pad="PA6" position="14"/>
+ <pin pad="PA5" position="15"/>
+ <pin pad="PA4" position="17"/>
+ <pin pad="AVCC" position="18"/>
+ <pin pad="AGND" position="21"/>
+ <pin pad="PA3" position="22"/>
+ <pin pad="PA2" position="23"/>
+ <pin pad="PA1" position="25"/>
+ <pin pad="PA0" position="26"/>
+ <pin pad="PB0" position="30"/>
+ <pin pad="PB1" position="31"/>
+ <pin pad="PB2" position="32"/>
+ </pinout>
+ </pinouts>
+</avr-tools-device-file><
\ No newline at end of file